cam_packet_util.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/types.h>
  6. #include <linux/slab.h>
  7. #include "cam_mem_mgr.h"
  8. #include "cam_packet_util.h"
  9. #include "cam_debug_util.h"
  10. #include "cam_common_util.h"
  11. #define CAM_UNIQUE_SRC_HDL_MAX 50
  12. struct cam_patch_unique_src_buf_tbl {
  13. int32_t hdl;
  14. dma_addr_t iova;
  15. size_t buf_size;
  16. uint32_t flags;
  17. };
  18. int cam_packet_util_get_cmd_mem_addr(int handle, uint32_t **buf_addr,
  19. size_t *len)
  20. {
  21. int rc = 0;
  22. uintptr_t kmd_buf_addr = 0;
  23. rc = cam_mem_get_cpu_buf(handle, &kmd_buf_addr, len);
  24. if (rc) {
  25. CAM_ERR(CAM_UTIL, "Unable to get the virtual address %d", rc);
  26. } else {
  27. if (kmd_buf_addr && *len) {
  28. *buf_addr = (uint32_t *)kmd_buf_addr;
  29. } else {
  30. CAM_ERR(CAM_UTIL, "Invalid addr and length :%zd", *len);
  31. rc = -ENOMEM;
  32. }
  33. }
  34. return rc;
  35. }
  36. int cam_packet_util_validate_cmd_desc(struct cam_cmd_buf_desc *cmd_desc)
  37. {
  38. if ((cmd_desc->length > cmd_desc->size) ||
  39. (cmd_desc->mem_handle <= 0)) {
  40. CAM_ERR(CAM_UTIL, "invalid cmd arg %d %d %d %d",
  41. cmd_desc->offset, cmd_desc->length,
  42. cmd_desc->mem_handle, cmd_desc->size);
  43. return -EINVAL;
  44. }
  45. return 0;
  46. }
  47. int cam_packet_util_validate_packet(struct cam_packet *packet,
  48. size_t remain_len)
  49. {
  50. size_t sum_cmd_desc = 0;
  51. size_t sum_io_cfgs = 0;
  52. size_t sum_patch_desc = 0;
  53. size_t pkt_wo_payload = 0;
  54. if (!packet)
  55. return -EINVAL;
  56. if ((size_t)packet->header.size > remain_len) {
  57. CAM_ERR(CAM_UTIL,
  58. "Invalid packet size: %zu, CPU buf length: %zu",
  59. (size_t)packet->header.size, remain_len);
  60. return -EINVAL;
  61. }
  62. CAM_DBG(CAM_UTIL, "num cmd buf:%d num of io config:%d kmd buf index:%d",
  63. packet->num_cmd_buf, packet->num_io_configs,
  64. packet->kmd_cmd_buf_index);
  65. sum_cmd_desc = packet->num_cmd_buf * sizeof(struct cam_cmd_buf_desc);
  66. sum_io_cfgs = packet->num_io_configs * sizeof(struct cam_buf_io_cfg);
  67. sum_patch_desc = packet->num_patches * sizeof(struct cam_patch_desc);
  68. pkt_wo_payload = offsetof(struct cam_packet, payload);
  69. if ((!packet->header.size) ||
  70. ((pkt_wo_payload + (size_t)packet->cmd_buf_offset +
  71. sum_cmd_desc) > (size_t)packet->header.size) ||
  72. ((pkt_wo_payload + (size_t)packet->io_configs_offset +
  73. sum_io_cfgs) > (size_t)packet->header.size) ||
  74. ((pkt_wo_payload + (size_t)packet->patch_offset +
  75. sum_patch_desc) > (size_t)packet->header.size)) {
  76. CAM_ERR(CAM_UTIL, "params not within mem len:%zu %zu %zu %zu",
  77. (size_t)packet->header.size, sum_cmd_desc,
  78. sum_io_cfgs, sum_patch_desc);
  79. return -EINVAL;
  80. }
  81. return 0;
  82. }
  83. int cam_packet_util_get_kmd_buffer(struct cam_packet *packet,
  84. struct cam_kmd_buf_info *kmd_buf)
  85. {
  86. int rc = 0;
  87. size_t len = 0;
  88. size_t remain_len = 0;
  89. struct cam_cmd_buf_desc *cmd_desc;
  90. uint32_t *cpu_addr;
  91. if (!packet || !kmd_buf) {
  92. CAM_ERR(CAM_UTIL, "Invalid arg %pK %pK", packet, kmd_buf);
  93. return -EINVAL;
  94. }
  95. if ((packet->kmd_cmd_buf_index < 0) ||
  96. (packet->kmd_cmd_buf_index >= packet->num_cmd_buf)) {
  97. CAM_ERR(CAM_UTIL, "Invalid kmd buf index: %d",
  98. packet->kmd_cmd_buf_index);
  99. return -EINVAL;
  100. }
  101. /* Take first command descriptor and add offset to it for kmd*/
  102. cmd_desc = (struct cam_cmd_buf_desc *) ((uint8_t *)
  103. &packet->payload + packet->cmd_buf_offset);
  104. cmd_desc += packet->kmd_cmd_buf_index;
  105. rc = cam_packet_util_validate_cmd_desc(cmd_desc);
  106. if (rc)
  107. return rc;
  108. rc = cam_packet_util_get_cmd_mem_addr(cmd_desc->mem_handle, &cpu_addr,
  109. &len);
  110. if (rc)
  111. return rc;
  112. remain_len = len;
  113. if (((size_t)cmd_desc->offset >= len) ||
  114. ((size_t)cmd_desc->size > (len - (size_t)cmd_desc->offset))) {
  115. CAM_ERR(CAM_UTIL, "invalid memory len:%zd and cmd desc size:%d",
  116. len, cmd_desc->size);
  117. return -EINVAL;
  118. }
  119. remain_len -= (size_t)cmd_desc->offset;
  120. if ((size_t)packet->kmd_cmd_buf_offset >= remain_len) {
  121. CAM_ERR(CAM_UTIL, "Invalid kmd cmd buf offset: %zu",
  122. (size_t)packet->kmd_cmd_buf_offset);
  123. return -EINVAL;
  124. }
  125. cpu_addr += (cmd_desc->offset / 4) + (packet->kmd_cmd_buf_offset / 4);
  126. CAM_DBG(CAM_UTIL, "total size %d, cmd size: %d, KMD buffer size: %d",
  127. cmd_desc->size, cmd_desc->length,
  128. cmd_desc->size - cmd_desc->length);
  129. CAM_DBG(CAM_UTIL, "hdl 0x%x, cmd offset %d, kmd offset %d, addr 0x%pK",
  130. cmd_desc->mem_handle, cmd_desc->offset,
  131. packet->kmd_cmd_buf_offset, cpu_addr);
  132. kmd_buf->cpu_addr = cpu_addr;
  133. kmd_buf->handle = cmd_desc->mem_handle;
  134. kmd_buf->offset = cmd_desc->offset + packet->kmd_cmd_buf_offset;
  135. kmd_buf->size = cmd_desc->size - cmd_desc->length;
  136. kmd_buf->used_bytes = 0;
  137. return rc;
  138. }
  139. void cam_packet_dump_patch_info(struct cam_packet *packet,
  140. int32_t iommu_hdl, int32_t sec_mmu_hdl)
  141. {
  142. struct cam_patch_desc *patch_desc = NULL;
  143. dma_addr_t iova_addr;
  144. size_t dst_buf_len;
  145. size_t src_buf_size;
  146. int i, rc = 0;
  147. int32_t hdl;
  148. uintptr_t cpu_addr = 0;
  149. uint32_t *dst_cpu_addr;
  150. uint32_t flags;
  151. uint64_t value = 0;
  152. patch_desc = (struct cam_patch_desc *)
  153. ((uint32_t *) &packet->payload +
  154. packet->patch_offset/4);
  155. CAM_INFO(CAM_UTIL, "Total num of patches : %d",
  156. packet->num_patches);
  157. for (i = 0; i < packet->num_patches; i++) {
  158. hdl = cam_mem_is_secure_buf(patch_desc[i].src_buf_hdl) ?
  159. sec_mmu_hdl : iommu_hdl;
  160. rc = cam_mem_get_io_buf(patch_desc[i].src_buf_hdl,
  161. hdl, &iova_addr, &src_buf_size, &flags);
  162. if (rc < 0) {
  163. CAM_ERR(CAM_UTIL,
  164. "unable to get src buf address for hdl 0x%x",
  165. hdl);
  166. return;
  167. }
  168. rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
  169. &cpu_addr, &dst_buf_len);
  170. if (rc < 0 || !cpu_addr || (dst_buf_len == 0)) {
  171. CAM_ERR(CAM_UTIL, "unable to get dst buf address");
  172. return;
  173. }
  174. dst_cpu_addr = (uint32_t *)cpu_addr;
  175. dst_cpu_addr = (uint32_t *)((uint8_t *)dst_cpu_addr +
  176. patch_desc[i].dst_offset);
  177. value = *((uint64_t *)dst_cpu_addr);
  178. CAM_INFO(CAM_UTIL,
  179. "i = %d src_buf 0x%llx src_hdl 0x%x src_buf_with_offset 0x%llx src_size 0x%llx src_flags: %x dst %p dst_offset %u dst_hdl 0x%x value 0x%llx",
  180. i, iova_addr, patch_desc[i].src_buf_hdl,
  181. (iova_addr + patch_desc[i].src_offset),
  182. src_buf_size, flags, dst_cpu_addr,
  183. patch_desc[i].dst_offset,
  184. patch_desc[i].dst_buf_hdl, value);
  185. if (!(*dst_cpu_addr))
  186. CAM_ERR(CAM_ICP, "Null at dst addr %p", dst_cpu_addr);
  187. }
  188. }
  189. static int cam_packet_util_get_patch_iova(
  190. struct cam_patch_unique_src_buf_tbl *tbl,
  191. int32_t hdl, uint32_t buf_hdl, dma_addr_t *iova,
  192. size_t *buf_size, uint32_t *flags)
  193. {
  194. int idx = 0;
  195. int rc = 0;
  196. size_t src_buf_size;
  197. dma_addr_t iova_addr;
  198. bool is_found = false;
  199. for (idx = 0; idx < CAM_UNIQUE_SRC_HDL_MAX; idx++) {
  200. if (buf_hdl == tbl[idx].hdl) {
  201. CAM_DBG(CAM_UTIL,
  202. "Matched entry for src_buf_hdl: 0x%x with src_hdl[%d]: 0x%x",
  203. buf_hdl, idx, tbl[idx].hdl);
  204. *iova = tbl[idx].iova;
  205. *buf_size = tbl[idx].buf_size;
  206. *flags = tbl[idx].flags;
  207. is_found = true;
  208. break;
  209. } else if ((tbl[idx].hdl == 0) || (tbl[idx].iova == 0)) {
  210. CAM_DBG(CAM_UTIL, "New src handle detected 0x%x", buf_hdl);
  211. is_found = false;
  212. break;
  213. }
  214. CAM_DBG(CAM_UTIL,
  215. "Index: %d is filled with differnt src_hdl: 0x%x",
  216. idx, buf_hdl);
  217. }
  218. if (!is_found) {
  219. CAM_DBG(CAM_UTIL, "src_hdl 0x%x not found in table entries",
  220. buf_hdl);
  221. rc = cam_mem_get_io_buf(buf_hdl, hdl, &iova_addr, &src_buf_size, flags);
  222. if (rc < 0) {
  223. CAM_ERR(CAM_UTIL,
  224. "unable to get iova for src_hdl: 0x%x",
  225. buf_hdl);
  226. return rc;
  227. }
  228. /* Update the table entry with unique src buf handle */
  229. if (idx < CAM_UNIQUE_SRC_HDL_MAX && tbl[idx].hdl == 0) {
  230. tbl[idx].buf_size = src_buf_size;
  231. tbl[idx].iova = iova_addr;
  232. tbl[idx].hdl = buf_hdl;
  233. tbl[idx].flags = *flags;
  234. CAM_DBG(CAM_UTIL,
  235. "Updated table index: %d with src_buf_hdl: 0x%x flags: %x",
  236. idx, tbl[idx].hdl, *flags);
  237. }
  238. *iova = iova_addr;
  239. *buf_size = src_buf_size;
  240. }
  241. return rc;
  242. }
  243. int cam_packet_util_process_patches(struct cam_packet *packet,
  244. int32_t iommu_hdl, int32_t sec_mmu_hdl)
  245. {
  246. struct cam_patch_desc *patch_desc = NULL;
  247. dma_addr_t iova_addr;
  248. uintptr_t cpu_addr = 0;
  249. dma_addr_t temp;
  250. uint32_t *dst_cpu_addr;
  251. size_t dst_buf_len;
  252. size_t src_buf_size;
  253. int i = 0;
  254. int rc = 0;
  255. uint32_t flags = 0;
  256. int32_t hdl;
  257. struct cam_patch_unique_src_buf_tbl
  258. tbl[CAM_UNIQUE_SRC_HDL_MAX];
  259. memset(tbl, 0, CAM_UNIQUE_SRC_HDL_MAX *
  260. sizeof(struct cam_patch_unique_src_buf_tbl));
  261. /* process patch descriptor */
  262. patch_desc = (struct cam_patch_desc *)
  263. ((uint32_t *) &packet->payload +
  264. packet->patch_offset/4);
  265. CAM_DBG(CAM_UTIL, "packet = %pK patch_desc = %pK size = %lu",
  266. (void *)packet, (void *)patch_desc,
  267. sizeof(struct cam_patch_desc));
  268. for (i = 0; i < packet->num_patches; i++) {
  269. hdl = cam_mem_is_secure_buf(patch_desc[i].src_buf_hdl) ?
  270. sec_mmu_hdl : iommu_hdl;
  271. rc = cam_packet_util_get_patch_iova(&tbl[0], hdl,
  272. patch_desc[i].src_buf_hdl, &iova_addr, &src_buf_size, &flags);
  273. if (rc) {
  274. CAM_ERR(CAM_UTIL,
  275. "get_iova failed for patch[%d], src_buf_hdl: 0x%x: rc: %d",
  276. i, patch_desc[i].src_buf_hdl, rc);
  277. return rc;
  278. }
  279. if ((size_t)patch_desc[i].src_offset >= src_buf_size) {
  280. CAM_ERR(CAM_UTIL,
  281. "Invalid src buf patch offset: patch:src_offset: 0x%x, src_buf_size: %zu",
  282. patch_desc[i].src_offset, src_buf_size);
  283. return -EINVAL;
  284. }
  285. temp = iova_addr;
  286. rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
  287. &cpu_addr, &dst_buf_len);
  288. if (rc < 0 || !cpu_addr || (dst_buf_len == 0)) {
  289. CAM_ERR(CAM_UTIL, "unable to get dst buf address");
  290. return rc;
  291. }
  292. dst_cpu_addr = (uint32_t *)cpu_addr;
  293. CAM_DBG(CAM_UTIL, "i = %d patch info = %x %x %x %x", i,
  294. patch_desc[i].dst_buf_hdl, patch_desc[i].dst_offset,
  295. patch_desc[i].src_buf_hdl, patch_desc[i].src_offset);
  296. if ((dst_buf_len < sizeof(void *)) ||
  297. ((dst_buf_len - sizeof(void *)) <
  298. (size_t)patch_desc[i].dst_offset)) {
  299. CAM_ERR(CAM_UTIL,
  300. "Invalid dst buf patch offset");
  301. return -EINVAL;
  302. }
  303. dst_cpu_addr = (uint32_t *)((uint8_t *)dst_cpu_addr +
  304. patch_desc[i].dst_offset);
  305. temp += patch_desc[i].src_offset;
  306. if ((flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) ||
  307. (flags & CAM_MEM_FLAG_CMD_BUF_TYPE))
  308. *dst_cpu_addr = temp;
  309. else
  310. *dst_cpu_addr = cam_smmu_is_expanded_memory() ?
  311. CAM_36BIT_INTF_GET_IOVA_BASE(temp) : temp;
  312. CAM_DBG(CAM_UTIL,
  313. "patch is done for dst %pk with src 0x%llx value 0x%llx",
  314. dst_cpu_addr, iova_addr, *((uint64_t *)dst_cpu_addr));
  315. }
  316. return rc;
  317. }
  318. int cam_packet_util_process_generic_cmd_buffer(
  319. struct cam_cmd_buf_desc *cmd_buf,
  320. cam_packet_generic_blob_handler blob_handler_cb, void *user_data)
  321. {
  322. int rc = 0;
  323. uintptr_t cpu_addr = 0;
  324. size_t buf_size;
  325. size_t remain_len = 0;
  326. uint32_t *blob_ptr;
  327. uint32_t blob_type, blob_size, blob_block_size, len_read;
  328. if (!cmd_buf || !blob_handler_cb) {
  329. CAM_ERR(CAM_UTIL, "Invalid args %pK %pK",
  330. cmd_buf, blob_handler_cb);
  331. return -EINVAL;
  332. }
  333. if (!cmd_buf->length || !cmd_buf->size) {
  334. CAM_ERR(CAM_UTIL, "Invalid cmd buf size %d %d",
  335. cmd_buf->length, cmd_buf->size);
  336. return -EINVAL;
  337. }
  338. rc = cam_mem_get_cpu_buf(cmd_buf->mem_handle, &cpu_addr, &buf_size);
  339. if (rc || !cpu_addr || (buf_size == 0)) {
  340. CAM_ERR(CAM_UTIL, "Failed in Get cpu addr, rc=%d, cpu_addr=%pK",
  341. rc, (void *)cpu_addr);
  342. return rc;
  343. }
  344. remain_len = buf_size;
  345. if ((buf_size < sizeof(uint32_t)) ||
  346. ((size_t)cmd_buf->offset > (buf_size - sizeof(uint32_t)))) {
  347. CAM_ERR(CAM_UTIL, "Invalid offset for cmd buf: %zu",
  348. (size_t)cmd_buf->offset);
  349. return -EINVAL;
  350. }
  351. remain_len -= (size_t)cmd_buf->offset;
  352. if (remain_len < (size_t)cmd_buf->length) {
  353. CAM_ERR(CAM_UTIL, "Invalid length for cmd buf: %zu",
  354. (size_t)cmd_buf->length);
  355. return -EINVAL;
  356. }
  357. blob_ptr = (uint32_t *)(((uint8_t *)cpu_addr) +
  358. cmd_buf->offset);
  359. CAM_DBG(CAM_UTIL,
  360. "GenericCmdBuffer cpuaddr=%pK, blobptr=%pK, len=%d",
  361. (void *)cpu_addr, (void *)blob_ptr, cmd_buf->length);
  362. len_read = 0;
  363. while (len_read < cmd_buf->length) {
  364. blob_type =
  365. ((*blob_ptr) & CAM_GENERIC_BLOB_CMDBUFFER_TYPE_MASK) >>
  366. CAM_GENERIC_BLOB_CMDBUFFER_TYPE_SHIFT;
  367. blob_size =
  368. ((*blob_ptr) & CAM_GENERIC_BLOB_CMDBUFFER_SIZE_MASK) >>
  369. CAM_GENERIC_BLOB_CMDBUFFER_SIZE_SHIFT;
  370. blob_block_size = sizeof(uint32_t) +
  371. (((blob_size + sizeof(uint32_t) - 1) /
  372. sizeof(uint32_t)) * sizeof(uint32_t));
  373. CAM_DBG(CAM_UTIL,
  374. "Blob type=%d size=%d block_size=%d len_read=%d total=%d",
  375. blob_type, blob_size, blob_block_size, len_read,
  376. cmd_buf->length);
  377. if (len_read + blob_block_size > cmd_buf->length) {
  378. CAM_ERR(CAM_UTIL, "Invalid Blob %d %d %d %d",
  379. blob_type, blob_size, len_read,
  380. cmd_buf->length);
  381. rc = -EINVAL;
  382. goto end;
  383. }
  384. len_read += blob_block_size;
  385. rc = blob_handler_cb(user_data, blob_type, blob_size,
  386. (uint8_t *)(blob_ptr + 1));
  387. if (rc) {
  388. CAM_ERR(CAM_UTIL, "Error in handling blob type %d %d",
  389. blob_type, blob_size);
  390. goto end;
  391. }
  392. blob_ptr += (blob_block_size / sizeof(uint32_t));
  393. }
  394. end:
  395. return rc;
  396. }