asoc: codecs: Initial lpass-cdc 2.6 implementation

Update register headers, add version 2.6 string.

Change-Id: I6236ddebba3fcbb37f2a64c8638d4eea4f6cc062
Signed-off-by: Matthew Rice <mrice@codeaurora.org>
Šī revīzija ir iekļauta:
Matthew Rice
2021-10-01 16:28:40 -07:00
revīziju iesūtīja Gerrit - the friendly Code Review server
vecāks 364ecf5de5
revīzija 08ad1635a5
5 mainīti faili ar 379 papildinājumiem un 6 dzēšanām

Parādīt failu

@@ -556,7 +556,8 @@ static const struct reg_default lpass_cdc_defaults[] = {
{ LPASS_CDC_WSA_TOP_SPKR_COMP8_LUT, 0x00},
{ LPASS_CDC_WSA_TOP_SPKR_COMP8_RD_LSB, 0x00},
{ LPASS_CDC_WSA_TOP_SPKR_COMP8_RD_MSB, 0x00},
{ LPASS_CDC_WSA_TOP_FS_UNGATE2, 0x03},
{ LPASS_CDC_WSA_TOP_FS_UNGATE2, 0x1F},
{ LPASS_CDC_WSA_TOP_SEQ_CTL0, 0x00},
{ LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0, 0x00},
{ LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1, 0x00},
{ LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG0, 0x00},
@@ -771,6 +772,65 @@ static const struct reg_default lpass_cdc_defaults[] = {
{ LPASS_CDC_WSA_VBAT_TEMP_VBAT_BCL_ATTN1, 0x04},
{ LPASS_CDC_WSA_VBAT_TEMP_VBAT_BCL_ATTN2, 0x08},
{ LPASS_CDC_WSA_VBAT_TEMP_VBAT_BCL_ATTN3, 0x0C},
/* lpass 2.6 new registers */
{ LPASS_CDC_WSA_PBR_PATH_CTL, 0x00},
{ LPASS_CDC_WSA_LA_CFG, 0x00},
{ LPASS_CDC_WSA_PBR_CFG1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG2, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG3, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG4, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG5, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG6, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG7, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG8, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG9, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG10, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG11, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG12, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG13, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG14, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG15, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG16, 0x00},
{ LPASS_CDC_WSA_PBR_CFG17, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG0, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG2, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG3, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG4, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG5, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG6, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG7, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG8, 0x00},
{ LPASS_CDC_WSA_LA_CFG_1, 0x00},
{ LPASS_CDC_WSA_PBR_CFG1_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG2_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG3_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG4_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG5_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG6_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG7_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG8_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG9_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG10_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG11_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG12_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG13_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG14_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG15_1, 0xFF},
{ LPASS_CDC_WSA_PBR_CFG16_1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG0_1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG1_1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG2_1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG5_1, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG9, 0x00},
{ LPASS_CDC_WSA_ILIM_CFG6_1, 0x00},
{ LPASS_CDC_WSA_PBR_CFG18, 0x00},
{ LPASS_CDC_WSA_PBR_CFG18_1, 0x00},
{ LPASS_CDC_WSA_PBR_CFG19, 0x00},
{ LPASS_CDC_WSA_PBR_CFG20, 0x00},
{ LPASS_CDC_WSA_PBR_CFG21, 0x00},
{ LPASS_CDC_WSA_PBR_CFG22, 0x00},
{ LPASS_CDC_WSA_PBR_CFG23, 0x00},
/* VA macro */
{ LPASS_CDC_VA_CLK_RST_CTRL_MCLK_CONTROL, 0x00},
@@ -795,6 +855,7 @@ static const struct reg_default lpass_cdc_defaults[] = {
{ LPASS_CDC_VA_TOP_CSR_SWR_MIC_CTL1, 0xEE},
{ LPASS_CDC_VA_TOP_CSR_SWR_MIC_CTL2, 0xEE},
{ LPASS_CDC_VA_TOP_CSR_SWR_CTRL, 0x06},
{ LPASS_CDC_VA_TOP_CSR_SEQ_CTL0, 0x00},
/* VA core */
{ LPASS_CDC_VA_INP_MUX_ADC_MUX0_CFG0, 0x00},
@@ -879,6 +940,7 @@ static const struct reg_default lpass_cdc_defaults[] = {
{ LPASS_CDC_WSA2_TOP_SPKR_COMP8_RD_LSB, 0x00},
{ LPASS_CDC_WSA2_TOP_SPKR_COMP8_RD_MSB, 0x00},
{ LPASS_CDC_WSA2_TOP_FS_UNGATE2, 0x03},
{ LPASS_CDC_WSA2_TOP_SEQ_CTL0, 0x00},
{ LPASS_CDC_WSA2_RX_INP_MUX_RX_INT0_CFG0, 0x00},
{ LPASS_CDC_WSA2_RX_INP_MUX_RX_INT0_CFG1, 0x00},
{ LPASS_CDC_WSA2_RX_INP_MUX_RX_INT1_CFG0, 0x00},
@@ -1093,6 +1155,65 @@ static const struct reg_default lpass_cdc_defaults[] = {
{ LPASS_CDC_WSA2_VBAT_TEMP_VBAT_BCL_ATTN1, 0x04},
{ LPASS_CDC_WSA2_VBAT_TEMP_VBAT_BCL_ATTN2, 0x08},
{ LPASS_CDC_WSA2_VBAT_TEMP_VBAT_BCL_ATTN3, 0x0C},
/* lpass 2.6 new registers */
{ LPASS_CDC_WSA2_PBR_PATH_CTL, 0x00},
{ LPASS_CDC_WSA2_LA_CFG, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG2, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG3, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG4, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG5, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG6, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG7, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG8, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG9, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG10, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG11, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG12, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG13, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG14, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG15, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG16, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG17, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG0, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG2, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG3, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG4, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG5, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG6, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG7, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG8, 0x00},
{ LPASS_CDC_WSA2_LA_CFG_1, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG1_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG2_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG3_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG4_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG5_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG6_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG7_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG8_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG9_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG10_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG11_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG12_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG13_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG14_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG15_1, 0xFF},
{ LPASS_CDC_WSA2_PBR_CFG16_1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG0_1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG1_1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG2_1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG5_1, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG9, 0x00},
{ LPASS_CDC_WSA2_ILIM_CFG6_1, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG18, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG18_1, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG19, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG20, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG21, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG22, 0x00},
{ LPASS_CDC_WSA2_PBR_CFG23, 0x00},
};
static bool lpass_cdc_is_readable_register(struct device *dev,