Files
android_kernel_xiaomi_sm8450/arch/arc/mm/tlb.c
Vineet Gupta f1f3347da9 ARC: MMU Context Management
ARC700 MMU provides for tagging TLB entries with a 8-bit ASID to avoid
having to flush the TLB every task switch.

It also allows for a quick way to invalidate all the TLB entries for
task useful for:
* COW sementics during fork()
* task exit()ing

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:51 +05:30

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/*
* TLB Management (flush/create/diagnostics) for ARC700
*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <asm/arcregs.h>
#include <asm/mmu_context.h>
#include <asm/tlb.h>
/* A copy of the ASID from the PID reg is kept in asid_cache */
int asid_cache = FIRST_ASID;
/* ASID to mm struct mapping. We have one extra entry corresponding to
* NO_ASID to save us a compare when clearing the mm entry for old asid
* see get_new_mmu_context (asm-arc/mmu_context.h)
*/
struct mm_struct *asid_mm_map[NUM_ASID + 1];