
Pull ARM Renesas SoC cleanup, refactoring and more SMP support from Kevin Hilman: "Lots of cleanup and refactoring and some SMP additions for Renesas platforms. Due to some inter-dependencies with other arm-soc branches, this Renesas stuff was separated out for sending after the other branches were merged. Highlights: - remove unused board support and cleanup of unused headers - refactoring of init and device registration - simplify IRQ initialization" * tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits) ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs ARM: shmobile: Introduce per-CPU SMP boot / sleep code ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779 ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0 ARM: shmobile: Add shared SCU CPU Hotplug code ARM: shmobile: Use shared SCU SMP boot code on emev2 ARM: shmobile: Use shared SCU SMP boot code on r8a7779 ARM: shmobile: Use shared SCU SMP boot code on sh73a0 ARM: shmobile: Introduce shared SCU SMP boot code ARM: shmobile: sh73a0: Remove global GPIO_NR definition ARM: shmobile: kzm9d: remove nfsroot settings from bootargs ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup ARM: shmobile: bockw: add missing __initdata ARM: shmobile: r8a7790: add missing __initdata ARM: shmobile: r8a7779: add missing __initdata ARM: shmobile: Remove unused shmobile_init_time() ARM: shmobile: Use clocksource_of_init() on r8a7790 ARM: shmobile: Use default ->init_time() on KZM9G DT ref ...
92 lines
2.0 KiB
ArmAsm
92 lines
2.0 KiB
ArmAsm
/*
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* SMP support for R-Mobile / SH-Mobile
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2010 Takashi Yoshii
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*
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* Based on vexpress, Copyright (c) 2003 ARM Limited, All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/memory.h>
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ENTRY(shmobile_invalidate_start)
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bl v7_invalidate_l1
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b secondary_startup
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ENDPROC(shmobile_invalidate_start)
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/*
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* Reset vector for secondary CPUs.
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* This will be mapped at address 0 by SBAR register.
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* We need _long_ jump to the physical address.
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*/
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.arm
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.align 12
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ENTRY(shmobile_boot_vector)
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ldr r0, 2f
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ldr r1, 1f
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bx r1
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ENDPROC(shmobile_boot_vector)
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.align 2
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.globl shmobile_boot_fn
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shmobile_boot_fn:
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1: .space 4
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.globl shmobile_boot_arg
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shmobile_boot_arg:
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2: .space 4
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/*
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* Per-CPU SMP boot function/argument selection code based on MPIDR
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*/
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ENTRY(shmobile_smp_boot)
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@ r0 = MPIDR_HWID_BITMASK
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mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
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and r0, r1, r0 @ r0 = cpu_logical_map() value
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mov r1, #0 @ r1 = CPU index
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adr r5, 1f @ array of per-cpu mpidr values
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adr r6, 2f @ array of per-cpu functions
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adr r7, 3f @ array of per-cpu arguments
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shmobile_smp_boot_find_mpidr:
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ldr r8, [r5, r1, lsl #2]
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cmp r8, r0
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bne shmobile_smp_boot_next
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ldr r9, [r6, r1, lsl #2]
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cmp r9, #0
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bne shmobile_smp_boot_found
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shmobile_smp_boot_next:
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add r1, r1, #1
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cmp r1, #CONFIG_NR_CPUS
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blo shmobile_smp_boot_find_mpidr
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b shmobile_smp_sleep
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shmobile_smp_boot_found:
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ldr r0, [r7, r1, lsl #2]
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mov pc, r9
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ENDPROC(shmobile_smp_boot)
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ENTRY(shmobile_smp_sleep)
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wfi
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b shmobile_smp_boot
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ENDPROC(shmobile_smp_sleep)
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.globl shmobile_smp_mpidr
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shmobile_smp_mpidr:
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1: .space CONFIG_NR_CPUS * 4
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.globl shmobile_smp_fn
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shmobile_smp_fn:
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2: .space CONFIG_NR_CPUS * 4
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.globl shmobile_smp_arg
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shmobile_smp_arg:
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3: .space CONFIG_NR_CPUS * 4
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