Heiner Kallweit eff041553d clk: meson-gxbb: expose clock CLKID_RNG0 ...

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

2017-03-16 17:58:46 +08:00

..

clk-cpu.c

clk: meson8b: clean up cpu clocks

2016-06-22 18:02:35 -07:00

clk-mpll.c

clk: meson: add mpll support

2016-06-22 18:02:59 -07:00

clk-pll.c

clk: meson: fractional pll support

2016-06-22 18:05:47 -07:00

clkc.h

gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b

2016-09-01 17:42:41 -07:00

gxbb-aoclk.c

clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()

2016-08-24 00:55:13 -07:00

gxbb.c

clk: gxbb: add the SAR ADC clocks and expose them

2017-01-23 10:18:21 -08:00

gxbb.h

clk: meson-gxbb: expose clock CLKID_RNG0

2017-03-16 17:58:46 +08:00

Kconfig

clk: gxbb: add AmLogic GXBB clk controller driver

2016-06-22 18:07:31 -07:00

Makefile

clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention

2016-09-01 17:31:44 -07:00

meson8b.c

clk: meson8b: fix clk81 register address

2017-01-26 15:54:48 -08:00

meson8b.h

meson: clk: Add support for clock gates

2016-09-01 17:43:12 -07:00