Palmer Dabbelt 8356c379cf RISC-V: gp_in_global needs register keyword ...

The Intel kernel build robot recently pointed out that I missed the
register keyword on this one when I refactored the code to remove local
register variables (which aren't supported by LLVM).  GCC's manual
indicates that global register variables must have the register keyword,
As far as I can tell lacking the register keyword causes GCC to ignore
the __asm__ and treat this as a regular variable, but I'm not sure how
that didn't show up as some sort of failure.

Fixes: 52e7c52d2d ("RISC-V: Stop relying on GCC's register allocator's hueristics")
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

2020-05-21 13:28:26 -07:00

..

vdso

riscv: add Linux note to vdso

2020-05-04 14:22:34 -07:00

.gitignore

.gitignore: add SPDX License Identifier

2020-03-25 11:50:48 +01:00

asm-offsets.c

riscv: abstract out CSR names for supervisor vs machine mode

2019-11-05 09:20:42 -08:00

cacheinfo.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286

2019-06-05 17:36:37 +02:00

clint.c

riscv: provide native clint access for M-mode

2019-11-17 15:17:39 -08:00

cpu_ops_sbi.c

RISC-V: Support cpu hotplug

2020-03-31 11:28:30 -07:00

cpu_ops_spinwait.c

RISC-V: Add cpu_ops and modify default booting method

2020-03-31 11:25:56 -07:00

cpu_ops.c

riscv: force __cpu_up_ variables to put in data section

2020-05-04 15:03:25 -07:00

cpu-hotplug.c

RISC-V: Support cpu hotplug

2020-03-31 11:28:30 -07:00

cpu.c

RISC-V: Remove unsupported isa string info print

2019-10-28 11:13:59 -07:00

cpufeature.c

RISC-V: Add bitmap reprensenting ISA features common across CPUs

2020-05-04 14:08:59 -07:00

entry.S

Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

2020-04-09 10:51:30 -07:00

fpu.S

riscv: abstract out CSR names for supervisor vs machine mode

2019-11-05 09:20:42 -08:00

ftrace.c

riscv: patch code by fixmap mapping

2020-03-26 09:24:55 -07:00

head.h

riscv: add prototypes for assembly language functions from head.S

2019-10-28 00:46:00 -07:00

head.S

riscv: Add SOC early init support

2020-04-03 10:46:43 -07:00

irq.c

riscv: prefix IRQ_ macro names with an RV_ namespace

2020-01-04 21:48:59 -08:00

Makefile

riscv: perf: RISCV_BASE_PMU should be independent

2020-05-12 16:21:46 -07:00

mcount-dyn.S

riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support

2018-04-02 19:59:13 -07:00

mcount.S

RISC-V: remove the unused return_to_handler export

2018-10-22 17:38:12 -07:00

module-sections.c

riscv: add missing header file includes

2019-10-28 00:46:01 -07:00

module.c

riscv: avoid the PIC offset of static percpu data in module beyond 2G limits

2020-03-03 10:27:45 -08:00

module.lds

RISC-V: Add section of GOT.PLT for kernel module

2018-04-02 20:00:54 -07:00

patch.c

riscv: introduce interfaces to patch kernel code

2020-03-26 09:24:52 -07:00

perf_callchain.c

riscv: abstract out CSR names for supervisor vs machine mode

2019-11-05 09:20:42 -08:00

perf_event.c

riscv: perf_event: Make some funciton static

2020-05-11 13:48:19 -07:00

perf_regs.c

riscv: Add support for perf registers sampling

2019-09-05 00:48:58 -07:00

process.c

RISC-V: gp_in_global needs register keyword

2020-05-21 13:28:26 -07:00

ptrace.c

riscv: fix seccomp reject syscall code path

2020-03-05 13:58:15 -08:00

reset.c

riscv: cleanup the default power off implementation

2019-11-13 13:22:52 -08:00

riscv_ksyms.c

riscv: Add KASAN support

2020-01-22 13:09:58 -08:00

sbi.c

riscv: sbi: Fix undefined reference to sbi_shutdown

2020-04-21 16:15:09 -07:00

setup.c

RISC-V: Support cpu hotplug

2020-03-31 11:28:30 -07:00

signal.c

riscv: add nommu support

2019-11-17 15:17:39 -08:00

smp.c

RISC-V: Export riscv_cpuid_to_hartid_mask() API

2020-05-04 14:08:58 -07:00

smpboot.c

RISC-V: Add supported for ordered booting method using HSM

2020-03-31 11:27:50 -07:00

soc.c

riscv: Add SOC early init support

2020-04-03 10:46:43 -07:00

stacktrace.c

riscv: stacktrace: Fix undefined reference to `walk_stackframe'

2020-05-12 17:04:25 -07:00

sys_riscv.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286

2019-06-05 17:36:37 +02:00

syscall_table.c

riscv: add missing header file includes

2019-10-28 00:46:01 -07:00

time.c

riscv: add missing header file includes

2019-10-28 00:46:01 -07:00

traps_misaligned.c

riscv: Unaligned load/store handling for M_MODE

2020-04-03 10:45:33 -07:00

traps.c

Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

2020-04-09 10:51:30 -07:00

vdso.c

riscv: add missing header file includes

2019-10-28 00:46:01 -07:00

vmlinux.lds.S

riscv: Add SOC early init support

2020-04-03 10:46:43 -07:00