Daniel Vetter ea9b6006b5
drm/i915: move set_pll_edp to intel_dp.c ...
Now that we enable the cpu edp pll in intel_dp->pre_enable and no
longer in crtc_mode_set, we can also move the modeset part to the
intel_dp->mode_set callback. Previously this was not possible because
the encoder ->mode_set callbacks are called after the crtc mode set
callback.
v2: Rebase on top of copy&pasted hsw crtc_mode_set.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2012-12-06 14:28:06 +01:00
2012-10-12 10:59:11 +02:00
2012-09-06 07:58:52 +02:00
2012-09-06 07:58:52 +02:00
2012-09-06 07:58:52 +02:00
2012-09-06 07:58:52 +02:00
2012-09-06 07:58:52 +02:00
2012-10-03 23:29:23 -07:00
2012-12-05 17:17:50 +01:00
2012-12-06 13:18:00 +01:00
2012-11-29 11:43:52 +01:00
2012-12-06 13:18:00 +01:00
2012-11-29 11:43:52 +01:00
2012-10-02 18:01:07 +01:00
2012-11-30 23:44:05 +01:00
2012-10-03 23:29:23 -07:00
2012-12-03 20:13:16 +01:00
2012-11-30 23:24:49 +01:00
2012-11-30 23:44:05 +01:00
2012-10-07 21:13:54 +10:00
2012-12-06 13:14:34 +01:00
2012-10-02 18:01:07 +01:00
2012-12-06 13:21:29 +01:00
2012-12-06 13:19:14 +01:00
2012-11-21 17:45:02 +01:00
2012-11-11 23:51:41 +01:00
2012-04-18 10:34:49 +02:00
2012-10-17 21:06:59 +02:00
2012-10-02 18:01:07 +01:00
2012-11-21 17:45:01 +01:00
2012-10-02 18:01:07 +01:00
2012-11-29 14:58:53 +01:00
2012-12-03 22:31:04 +01:00
2012-12-06 14:28:06 +01:00
2012-12-06 14:28:06 +01:00
2012-11-29 12:25:06 +01:00
2012-10-03 23:29:23 -07:00
2012-11-30 23:38:46 +01:00
2012-11-29 14:58:53 +01:00
2012-12-06 13:19:13 +01:00
2012-11-29 12:51:37 +01:00
2012-11-21 22:12:26 +01:00
2012-10-22 14:34:51 +02:00
2012-11-30 23:43:32 +01:00
2012-11-21 17:45:05 +01:00
2012-11-30 23:29:59 +01:00
2012-12-06 13:14:34 +01:00
2012-12-06 13:14:34 +01:00
2012-10-24 15:12:48 +02:00
2012-11-29 11:42:38 +01:00
2012-11-11 23:51:14 +01:00
2012-11-21 22:12:26 +01:00
2012-07-25 18:23:48 +02:00
ea9b6006b5