7587b5965f
From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
210 lines
4.6 KiB
Plaintext
210 lines
4.6 KiB
Plaintext
/*
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* Device Tree Source for Renesas r8a7779
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Simon Horman
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "renesas,r8a7779";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <3>;
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};
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};
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gic: interrupt-controller@f0001000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0xf0001000 0x1000>,
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<0xf0000100 0x100>;
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};
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gpio0: gpio@ffc40000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc40000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 141 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 0 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio1: gpio@ffc41000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc41000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 142 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@ffc42000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc42000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 143 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@ffc43000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc43000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 144 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 96 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@ffc44000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc44000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 145 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 128 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio5: gpio@ffc45000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc45000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 146 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 160 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio6: gpio@ffc46000 {
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compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
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reg = <0xffc46000 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 147 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 192 9>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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irqpin0: irqpin@fe780010 {
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compatible = "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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status = "disabled";
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interrupt-controller;
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reg = <0xfe78001c 4>,
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<0xfe780010 4>,
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<0xfe780024 4>,
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<0xfe780044 4>,
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<0xfe780064 4>;
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interrupt-parent = <&gic>;
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interrupts = <0 27 0x4
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0 28 0x4
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0 29 0x4
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0 30 0x4>;
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sense-bitfield-width = <2>;
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};
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i2c0: i2c@ffc70000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xffc70000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 79 0x4>;
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status = "disabled";
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};
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i2c1: i2c@ffc71000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xffc71000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 82 0x4>;
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status = "disabled";
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};
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i2c2: i2c@ffc72000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xffc72000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 80 0x4>;
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status = "disabled";
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};
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i2c3: i2c@ffc73000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xffc73000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 81 0x4>;
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status = "disabled";
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};
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pfc: pfc@fffc0000 {
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compatible = "renesas,pfc-r8a7779";
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reg = <0xfffc0000 0x23c>;
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};
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thermal@ffc48000 {
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compatible = "renesas,rcar-thermal";
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reg = <0xffc48000 0x38>;
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};
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sata: sata@fc600000 {
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compatible = "renesas,rcar-sata";
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reg = <0xfc600000 0x2000>;
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interrupt-parent = <&gic>;
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interrupts = <0 100 0x4>;
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};
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};
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