bf6476152a
[ Upstream commit c47f892d7aa62765bf0689073f75990b4517a4cf ] Daniel reported that with Commit4ca234a9cb("powerpc/smp: Stop updating cpu_core_mask") QEMU was unable to set single NUMA node SMP topologies such as: -smp 8,maxcpus=8,cores=2,threads=2,sockets=2 i.e he expected 2 sockets in one NUMA node. The above commit helped to reduce boot time on Large Systems for example 4096 vCPU single socket QEMU instance. PAPR is silent on having more than one socket within a NUMA node. cpu_core_mask and cpu_cpu_mask for any CPU would be same unless the number of sockets is different from the number of NUMA nodes. One option is to reintroduce cpu_core_mask but use a slightly different method to arrive at the cpu_core_mask. Previously each CPU's chip-id would be compared with all other CPU's chip-id to verify if both the CPUs were related at the chip level. Now if a CPU 'A' is found related / (unrelated) to another CPU 'B', all the thread siblings of 'A' and thread siblings of 'B' are automatically marked as related / (unrelated). Also if a platform doesn't support ibm,chip-id property, i.e its cpu_to_chip_id returns -1, cpu_core_map holds a copy of cpu_cpu_mask(). Fixes:4ca234a9cb("powerpc/smp: Stop updating cpu_core_mask") Reported-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210415120934.232271-2-srikar@linux.vnet.ibm.com Signed-off-by: Sasha Levin <sashal@kernel.org>
272 lines
7.2 KiB
C
272 lines
7.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* smp.h: PowerPC-specific SMP code.
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*
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* Original was a copy of sparc smp.h. Now heavily modified
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* for PPC.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
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*/
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#ifndef _ASM_POWERPC_SMP_H
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#define _ASM_POWERPC_SMP_H
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#ifdef __KERNEL__
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/irqreturn.h>
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#endif
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#include <asm/percpu.h>
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extern int boot_cpuid;
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extern int spinning_secondaries;
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extern u32 *cpu_to_phys_id;
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extern bool coregroup_enabled;
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extern int cpu_to_chip_id(int cpu);
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#ifdef CONFIG_SMP
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struct smp_ops_t {
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void (*message_pass)(int cpu, int msg);
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#ifdef CONFIG_PPC_SMP_MUXED_IPI
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void (*cause_ipi)(int cpu);
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#endif
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int (*cause_nmi_ipi)(int cpu);
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void (*probe)(void);
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int (*kick_cpu)(int nr);
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int (*prepare_cpu)(int nr);
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void (*setup_cpu)(int nr);
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void (*bringup_done)(void);
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void (*take_timebase)(void);
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void (*give_timebase)(void);
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int (*cpu_disable)(void);
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void (*cpu_die)(unsigned int nr);
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int (*cpu_bootable)(unsigned int nr);
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#ifdef CONFIG_HOTPLUG_CPU
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void (*cpu_offline_self)(void);
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#endif
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};
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extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
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extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
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extern void smp_send_debugger_break(void);
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extern void start_secondary_resume(void);
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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DECLARE_PER_CPU(unsigned int, cpu_pvr);
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#ifdef CONFIG_HOTPLUG_CPU
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int generic_cpu_disable(void);
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void generic_cpu_die(unsigned int cpu);
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void generic_set_cpu_dead(unsigned int cpu);
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void generic_set_cpu_up(unsigned int cpu);
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int generic_check_cpu_restart(unsigned int cpu);
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int is_cpu_dead(unsigned int cpu);
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#else
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#define generic_set_cpu_up(i) do { } while (0)
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#endif
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#ifdef CONFIG_PPC64
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#define raw_smp_processor_id() (local_paca->paca_index)
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#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
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#else
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/* 32-bit */
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extern int smp_hw_index[];
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/*
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* This is particularly ugly: it appears we can't actually get the definition
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* of task_struct here, but we need access to the CPU this task is running on.
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* Instead of using task_struct we're using _TASK_CPU which is extracted from
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* asm-offsets.h by kbuild to get the current processor ID.
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*
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* This also needs to be safeguarded when building asm-offsets.s because at
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* that time _TASK_CPU is not defined yet. It could have been guarded by
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* _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
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* when building something else than asm-offsets.s
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*/
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#ifdef GENERATING_ASM_OFFSETS
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#define raw_smp_processor_id() (0)
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#else
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#define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU))
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#endif
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#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return smp_hw_index[cpu];
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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smp_hw_index[cpu] = phys;
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}
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#endif
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DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
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DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
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DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
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static inline struct cpumask *cpu_sibling_mask(int cpu)
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{
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return per_cpu(cpu_sibling_map, cpu);
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}
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static inline struct cpumask *cpu_core_mask(int cpu)
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{
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return per_cpu(cpu_core_map, cpu);
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}
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static inline struct cpumask *cpu_l2_cache_mask(int cpu)
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{
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return per_cpu(cpu_l2_cache_map, cpu);
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}
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static inline struct cpumask *cpu_smallcore_mask(int cpu)
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{
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return per_cpu(cpu_smallcore_map, cpu);
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}
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extern int cpu_to_core_id(int cpu);
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extern bool has_big_cores;
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#define cpu_smt_mask cpu_smt_mask
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#ifdef CONFIG_SCHED_SMT
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static inline const struct cpumask *cpu_smt_mask(int cpu)
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{
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if (has_big_cores)
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return per_cpu(cpu_smallcore_map, cpu);
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return per_cpu(cpu_sibling_map, cpu);
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}
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#endif /* CONFIG_SCHED_SMT */
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/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
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*
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* Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
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* in /proc/interrupts will be wrong!!! --Troy */
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#define PPC_MSG_CALL_FUNCTION 0
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#define PPC_MSG_RESCHEDULE 1
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#define PPC_MSG_TICK_BROADCAST 2
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#define PPC_MSG_NMI_IPI 3
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/* This is only used by the powernv kernel */
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#define PPC_MSG_RM_HOST_ACTION 4
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#define NMI_IPI_ALL_OTHERS -2
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#ifdef CONFIG_NMI_IPI
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extern int smp_handle_nmi_ipi(struct pt_regs *regs);
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#else
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static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
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#endif
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/* for irq controllers that have dedicated ipis per message (4) */
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extern int smp_request_message_ipi(int virq, int message);
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extern const char *smp_ipi_name[];
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/* for irq controllers with only a single ipi */
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extern void smp_muxed_ipi_message_pass(int cpu, int msg);
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extern void smp_muxed_ipi_set_message(int cpu, int msg);
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extern irqreturn_t smp_ipi_demux(void);
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extern irqreturn_t smp_ipi_demux_relaxed(void);
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void smp_init_pSeries(void);
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void smp_init_cell(void);
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void smp_setup_cpu_maps(void);
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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#else
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/* for UP */
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#define hard_smp_processor_id() get_hard_smp_processor_id(0)
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#define smp_setup_cpu_maps()
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static inline void inhibit_secondary_onlining(void) {}
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static inline void uninhibit_secondary_onlining(void) {}
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static inline const struct cpumask *cpu_sibling_mask(int cpu)
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{
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return cpumask_of(cpu);
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}
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static inline const struct cpumask *cpu_smallcore_mask(int cpu)
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{
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return cpumask_of(cpu);
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}
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_PPC64
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return paca_ptrs[cpu]->hw_cpu_id;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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paca_ptrs[cpu]->hw_cpu_id = phys;
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}
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#else
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/* 32-bit */
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#ifndef CONFIG_SMP
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extern int boot_cpuid_phys;
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return boot_cpuid_phys;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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boot_cpuid_phys = phys;
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}
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#endif /* !CONFIG_SMP */
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#endif /* !CONFIG_PPC64 */
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#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
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extern void smp_release_cpus(void);
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#else
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static inline void smp_release_cpus(void) { };
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#endif
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extern int smt_enabled_at_boot;
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extern void smp_mpic_probe(void);
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extern void smp_mpic_setup_cpu(int cpu);
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extern int smp_generic_kick_cpu(int nr);
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extern int smp_generic_cpu_bootable(unsigned int nr);
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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extern struct smp_ops_t *smp_ops;
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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/* Definitions relative to the secondary CPU spin loop
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* and entry point. Not all of them exist on both 32 and
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* 64-bit but defining them all here doesn't harm
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*/
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extern void generic_secondary_smp_init(void);
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extern unsigned long __secondary_hold_spinloop;
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extern unsigned long __secondary_hold_acknowledge;
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extern char __secondary_hold;
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extern unsigned int booting_thread_hwid;
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extern void __early_start(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SMP_H) */
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