e2c5eb78a3
The GPMC binding is obviously very confusing as the values are all over the place. People seem to confuse the GPMC partition size for the chip select, and the device IO size within the GPMC partition easily. The ranges entry contains the GPMC partition size. And the reg entry contains the size of the IO registers of the device connected to the GPMC. Let's fix the issue according to the following table: Device GPMC partition size Device IO size connected in the ranges entry in the reg entry NAND 0x01000000 (16MB) 4 16550 0x01000000 (16MB) 8 smc91x 0x01000000 (16MB) 0xf smc911x 0x01000000 (16MB) 0xff OneNAND 0x01000000 (16MB) 0x20000 (128KB) 16MB NOR 0x01000000 (16MB) 0x01000000 (16MB) 32MB NOR 0x02000000 (32MB) 0x02000000 (32MB) 64MB NOR 0x04000000 (64MB) 0x04000000 (64MB) 128MB NOR 0x08000000 (128MB) 0x08000000 (128MB) 256MB NOR 0x10000000 (256MB) 0x10000000 (256MB) Let's also add comments to the fixed entries while at it. Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
283 lines
6.5 KiB
Plaintext
283 lines
6.5 KiB
Plaintext
/*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "omap34xx.dtsi"
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#include "omap-gpmc-smsc911x.dtsi"
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/ {
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model = "TI OMAP3430 LDP (Zoom1 Labrador)";
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compatible = "ti,omap3-ldp", "ti,omap3";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x8000000>; /* 128 MB */
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};
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_key_pins>;
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key_enter {
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label = "enter";
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gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* gpio101 */
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linux,code = <0x0107001c>; /* KEY_ENTER */
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gpio-key,wakeup;
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};
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key_f1 {
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label = "f1";
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gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* gpio102 */
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linux,code = <0x0303003b>; /* KEY_F1 */
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gpio-key,wakeup;
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};
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key_f2 {
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label = "f2";
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gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; /* gpio103 */
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linux,code = <0x0403003c>; /* KEY_F2 */
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gpio-key,wakeup;
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};
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key_f3 {
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label = "f3";
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gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; /* gpio104 */
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linux,code = <0x0503003d>; /* KEY_F3 */
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gpio-key,wakeup;
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};
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key_f4 {
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label = "f4";
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gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; /* gpio105 */
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linux,code = <0x0704003e>; /* KEY_F4 */
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gpio-key,wakeup;
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};
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key_left {
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label = "left";
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gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
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linux,code = <0x04070069>; /* KEY_LEFT */
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gpio-key,wakeup;
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};
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key_right {
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label = "right";
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gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* gpio107 */
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linux,code = <0x0507006a>; /* KEY_RIGHT */
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gpio-key,wakeup;
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};
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key_up {
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label = "up";
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gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* gpio108 */
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linux,code = <0x06070067>; /* KEY_UP */
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gpio-key,wakeup;
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};
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key_down {
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label = "down";
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gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; /* gpio109 */
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linux,code = <0x0707006c>; /* KEY_DOWN */
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gpio-key,wakeup;
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};
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};
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x01000000>,
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<1 0 0x08000000 0x01000000>;
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nand@0,0 {
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linux,mtd-name= "micron,nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "X-Loader";
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reg = <0 0x80000>;
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};
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partition@80000 {
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label = "U-Boot";
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reg = <0x80000 0x140000>;
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};
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partition@1c0000 {
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label = "Environment";
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reg = <0x1c0000 0x40000>;
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};
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partition@200000 {
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label = "Kernel";
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reg = <0x200000 0x1e00000>;
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};
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partition@2000000 {
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label = "Filesystem";
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reg = <0x2000000 0xe000000>;
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};
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};
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ethernet@gpmc {
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interrupt-parent = <&gpio5>;
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interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
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reg = <1 0 0xff>;
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};
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};
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&i2c1 {
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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twl_power: power {
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compatible = "ti,twl4030-power-idle";
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ti,use_poweroff;
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};
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};
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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#include "omap3-panel-sharp-ls037v7dw01.dtsi"
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&backlight0 {
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gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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};
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/* tps61130rsa enabled by twl4030 regen */
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&lcd_3v3 {
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regulator-always-on;
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};
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&lcd0 {
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enable-gpios = <&twl_gpio 15 GPIO_ACTIVE_HIGH>; /* lcd INI */
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reset-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>; /* gpio55, lcd RESB */
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mode-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio56, lcd MO */
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};
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&mcspi1 {
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tsc2046@0 {
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interrupt-parent = <&gpio2>;
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interrupts = <22 0>; /* gpio54 */
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pendown-gpio = <&gpio2 22 0>;
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};
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};
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&mmc1 {
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/* See 35xx errata 2.1.1.128 in SPRZ278F */
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compatible = "ti,omap3-pre-es3-hsmmc";
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vmmc-supply = <&vmmc1>;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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};
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&mmc2 {
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status="disabled";
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};
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&mmc3 {
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status="disabled";
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};
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&omap3_pmx_core {
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gpio_key_pins: pinmux_gpio_key_pins {
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pinctrl-single,pins = <
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0xea (PIN_INPUT | MUX_MODE4) /* cam_d2.gpio_101 */
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0xec (PIN_INPUT | MUX_MODE4) /* cam_d3.gpio_102 */
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0xee (PIN_INPUT | MUX_MODE4) /* cam_d4.gpio_103 */
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0xf0 (PIN_INPUT | MUX_MODE4) /* cam_d5.gpio_104 */
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0xf2 (PIN_INPUT | MUX_MODE4) /* cam_d6.gpio_105 */
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0xf4 (PIN_INPUT | MUX_MODE4) /* cam_d7.gpio_106 */
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0xf6 (PIN_INPUT | MUX_MODE4) /* cam_d8.gpio_107 */
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0xf8 (PIN_INPUT | MUX_MODE4) /* cam_d9.gpio_108 */
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0xfa (PIN_INPUT | MUX_MODE4) /* cam_d10.gpio_109 */
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>;
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};
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musb_pins: pinmux_musb_pins {
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pinctrl-single,pins = <
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0x172 (PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
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0x17a (PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
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0x17c (PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
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0x17e (PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
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0x180 (PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
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0x182 (PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
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0x184 (PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
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0x186 (PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
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0x188 (PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
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0x176 (PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
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0x178 (PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
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0x174 (PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
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OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
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OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
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OMAP3_CORE1_IOPAD(0x214A, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
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OMAP3_CORE1_IOPAD(0x214C, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
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OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
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>;
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};
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};
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&uart3 {
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interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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};
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&usb_otg_hs {
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pinctrl-names = "default";
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pinctrl-0 = <&musb_pins>;
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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mode = <3>;
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power = <50>;
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};
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&vaux1 {
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/* Needed for ads7846 */
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regulator-name = "vcc";
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};
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