d7dba6be0f
The commita9ddb575d6("dmaengine: dw_dmac: Enhance device tree support") introduces is_private property in uncertain understanding what does it mean. First of all, documentation defines DMA_PRIVATE capability as Documentation/crypto/async-tx-api.txt: The DMA_PRIVATE capability flag is used to tag dma devices that should not be used by the general-purpose allocator. It can be set at initialization time if it is known that a channel will always be private. Alternatively, it is set when dma_request_channel() finds an unused "public" channel. A couple caveats to note when implementing a driver and consumer: 1/ Once a channel has been privately allocated it will no longer be considered by the general-purpose allocator even after a call to dma_release_channel(). 2/ Since capabilities are specified at the device level a dma_device with multiple channels will either have all channels public, or all channels private. Documentation/driver-api/dmaengine/provider.rst: - DMA_PRIVATE The devices only supports slave transfers, and as such isn't available for async transfers. The capability had been introduced by the commit59b5ec2144("dmaengine: introduce dma_request_channel and private channels") and some code didn't changed from that times ever. Taking into consideration above and the fact that on all known platforms Synopsys DesignWare DMA engine is attached to serve slave transfers, the DMA_PRIVATE capability must be enabled for this device unconditionally. Otherwise, as rightfully noticed in drivers/dma/at_xdmac.c: /* * Without DMA_PRIVATE the driver is not able to allocate more than * one channel, second allocation fails in private_candidate. */ because of of a caveats mentioned in above documentation excerpts. So, remove conditional around DMA_PRIVATE followed by removal leftovers. If someone wonders, DMA_PRIVATE can be not used if and only if the all channels of the DMA controller are supposed to serve memory-to-memory like operations. For example, EP93xx has two controllers, one of which can only perform memory-to-memory transfers Note, this change doesn't affect dmatest to be able to test such controllers. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (maintainer:SERIAL DRIVERS) Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
150 lines
3.3 KiB
C
150 lines
3.3 KiB
C
/*
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* PCI driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2013 Intel Corporation
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/device.h>
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#include "internal.h"
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static struct dw_dma_platform_data mrfld_pdata = {
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.nr_channels = 8,
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.is_memcpy = true,
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.is_idma32 = true,
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.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
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.chan_priority = CHAN_PRIORITY_ASCENDING,
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.block_size = 131071,
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.nr_masters = 1,
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.data_width = {4},
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.multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
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};
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static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
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{
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const struct dw_dma_platform_data *pdata = (void *)pid->driver_data;
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struct dw_dma_chip *chip;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
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if (ret) {
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dev_err(&pdev->dev, "I/O memory remapping failed\n");
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return ret;
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}
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pci_set_master(pdev);
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pci_try_set_mwi(pdev);
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ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->dev = &pdev->dev;
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chip->id = pdev->devfn;
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chip->regs = pcim_iomap_table(pdev)[0];
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chip->irq = pdev->irq;
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chip->pdata = pdata;
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ret = dw_dma_probe(chip);
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if (ret)
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return ret;
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pci_set_drvdata(pdev, chip);
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return 0;
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}
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static void dw_pci_remove(struct pci_dev *pdev)
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{
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struct dw_dma_chip *chip = pci_get_drvdata(pdev);
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int ret;
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ret = dw_dma_remove(chip);
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if (ret)
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dev_warn(&pdev->dev, "can't remove device properly: %d\n", ret);
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}
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#ifdef CONFIG_PM_SLEEP
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static int dw_pci_suspend_late(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct dw_dma_chip *chip = pci_get_drvdata(pci);
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return dw_dma_disable(chip);
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};
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static int dw_pci_resume_early(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct dw_dma_chip *chip = pci_get_drvdata(pci);
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return dw_dma_enable(chip);
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};
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops dw_pci_dev_pm_ops = {
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_pci_suspend_late, dw_pci_resume_early)
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};
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static const struct pci_device_id dw_pci_id_table[] = {
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/* Medfield (GPDMA) */
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{ PCI_VDEVICE(INTEL, 0x0827) },
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/* BayTrail */
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{ PCI_VDEVICE(INTEL, 0x0f06) },
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{ PCI_VDEVICE(INTEL, 0x0f40) },
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/* Merrifield iDMA 32-bit (GPDMA) */
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{ PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&mrfld_pdata },
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/* Braswell */
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{ PCI_VDEVICE(INTEL, 0x2286) },
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{ PCI_VDEVICE(INTEL, 0x22c0) },
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/* Haswell */
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{ PCI_VDEVICE(INTEL, 0x9c60) },
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/* Broadwell */
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{ PCI_VDEVICE(INTEL, 0x9ce0) },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, dw_pci_id_table);
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static struct pci_driver dw_pci_driver = {
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.name = "dw_dmac_pci",
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.id_table = dw_pci_id_table,
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.probe = dw_pci_probe,
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.remove = dw_pci_remove,
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.driver = {
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.pm = &dw_pci_dev_pm_ops,
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},
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};
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module_pci_driver(dw_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller PCI driver");
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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