d22ce25f87
The PCI controllers in the AR71XX and in the AR724X SoCs are different, and both of them uses different IRQ wiring. The patch modifies the 'pcibios_map_irq' function in order to allow to use different IRQ maps for the different SoCs. The patch also adds a function, which lets the board setup code to override the default IRQ map. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
124 lines
2.7 KiB
C
124 lines
2.7 KiB
C
/*
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* Atheros AR71XX/AR724X specific PCI setup code
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*
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* Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/irq.h>
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#include <asm/mach-ath79/pci.h>
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#include "pci.h"
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static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
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static const struct ath79_pci_irq *ath79_pci_irq_map __initdata;
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static unsigned ath79_pci_nr_irqs __initdata;
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static struct ar724x_pci_data *pci_data;
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static int pci_data_size;
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static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {
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{
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.slot = 17,
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.pin = 1,
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.irq = ATH79_PCI_IRQ(0),
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}, {
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.slot = 18,
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.pin = 1,
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.irq = ATH79_PCI_IRQ(1),
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}, {
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.slot = 19,
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.pin = 1,
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.irq = ATH79_PCI_IRQ(2),
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}
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};
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static const struct ath79_pci_irq ar724x_pci_irq_map[] __initconst = {
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{
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.slot = 0,
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.pin = 1,
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.irq = ATH79_PCI_IRQ(0),
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}
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};
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void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
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{
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pci_data = data;
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pci_data_size = size;
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}
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int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
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{
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int irq = -1;
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int i;
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if (ath79_pci_nr_irqs == 0 ||
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ath79_pci_irq_map == NULL) {
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if (soc_is_ar71xx()) {
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ath79_pci_irq_map = ar71xx_pci_irq_map;
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ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
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} else if (soc_is_ar724x()) {
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ath79_pci_irq_map = ar724x_pci_irq_map;
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ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
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} else {
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pr_crit("pci %s: invalid irq map\n",
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pci_name((struct pci_dev *) dev));
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return irq;
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}
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}
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for (i = 0; i < ath79_pci_nr_irqs; i++) {
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const struct ath79_pci_irq *entry;
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entry = &ath79_pci_irq_map[i];
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if (entry->slot == slot && entry->pin == pin) {
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irq = entry->irq;
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break;
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}
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}
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if (irq < 0)
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pr_crit("pci %s: no irq found for pin %u\n",
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pci_name((struct pci_dev *) dev), pin);
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else
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pr_info("pci %s: using irq %d for pin %u\n",
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pci_name((struct pci_dev *) dev), irq, pin);
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return irq;
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}
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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if (ath79_pci_plat_dev_init)
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return ath79_pci_plat_dev_init(dev);
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return 0;
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}
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void __init ath79_pci_set_irq_map(unsigned nr_irqs,
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const struct ath79_pci_irq *map)
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{
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ath79_pci_nr_irqs = nr_irqs;
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ath79_pci_irq_map = map;
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}
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void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))
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{
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ath79_pci_plat_dev_init = func;
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}
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int __init ath79_register_pci(void)
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{
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if (soc_is_ar71xx())
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return ar71xx_pcibios_init();
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if (soc_is_ar724x())
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return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);
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return -ENODEV;
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}
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