
Pull "Few omap interconnect dts fixes for v4.16 merge window" from
Tony Lindgren:
Now that we have the dts clocks for the clkctrl clock and the
interconnect binding, we need to update the existing ti-sysc
users according to the binding to make it usable for drivers.
Apologies for not being able to send this earlier but it took
me few revisions to get the smartreflex changes right and
tested with yet to be posted patches to make smartreflex probe
with dts and I wanted to have it sit in next for a while to make
sure we're not introducing regressions for legacy platform data
based booting.
Note that this is based on a merge with commit 20a2742e57
("dt-bindings: ti-sysc: Update binding for timers and capabilities")
to avoid a merge conflict with the binding changes.
* tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Update ti-sysc data for existing users
ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
dt-bindings: ti-sysc: Update binding for timers and capabilities
104 lines
2.3 KiB
Plaintext
104 lines
2.3 KiB
Plaintext
/*
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* Device Tree Source for am3517 SoC
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include "omap3.dtsi"
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/ {
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aliases {
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serial3 = &uart4;
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can = &hecc;
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};
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ocp@68000000 {
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am35x_otg_hs: am35x_otg_hs@5c040000 {
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compatible = "ti,omap3-musb";
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ti,hwmods = "am35x_otg_hs";
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status = "disabled";
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reg = <0x5c040000 0x1000>;
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interrupts = <71>;
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interrupt-names = "mc";
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};
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davinci_emac: ethernet@5c000000 {
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compatible = "ti,am3517-emac";
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ti,hwmods = "davinci_emac";
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status = "disabled";
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reg = <0x5c000000 0x30000>;
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interrupts = <67 68 69 70>;
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syscon = <&scm_conf>;
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ti,davinci-ctrl-reg-offset = <0x10000>;
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ti,davinci-ctrl-mod-reg-offset = <0>;
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ti,davinci-ctrl-ram-offset = <0x20000>;
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ti,davinci-ctrl-ram-size = <0x2000>;
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ti,davinci-rmii-en = /bits/ 8 <1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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davinci_mdio: ethernet@5c030000 {
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compatible = "ti,davinci_mdio";
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ti,hwmods = "davinci_mdio";
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status = "disabled";
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reg = <0x5c030000 0x1000>;
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bus_freq = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart4: serial@4809e000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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status = "disabled";
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reg = <0x4809e000 0x400>;
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interrupts = <84>;
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dmas = <&sdma 55 &sdma 54>;
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dma-names = "tx", "rx";
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clock-frequency = <48000000>;
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};
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omap3_pmx_core2: pinmux@480025d8 {
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compatible = "ti,omap3-padconf", "pinctrl-single";
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reg = <0x480025d8 0x24>;
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#address-cells = <1>;
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#size-cells = <0>;
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#pinctrl-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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hecc: can@5c050000 {
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compatible = "ti,am3517-hecc";
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status = "disabled";
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reg = <0x5c050000 0x80>,
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<0x5c053000 0x180>,
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<0x5c052000 0x200>;
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reg-names = "hecc", "hecc-ram", "mbx";
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interrupts = <24>;
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clocks = <&hecc_ck>;
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};
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};
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};
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&iva {
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status = "disabled";
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};
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&mailbox {
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status = "disabled";
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};
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&mmu_isp {
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status = "disabled";
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};
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/include/ "am35xx-clocks.dtsi"
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/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
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