c9eb6172c3
After we removed all the dead wood it turns out only two architectures actually implement dma_cache_sync as a real op: mips and parisc. Add a cache_sync method to struct dma_map_ops and implement it for the mips defualt DMA ops, and the parisc pa11 ops. Note that arm, arc and openrisc support DMA_ATTR_NON_CONSISTENT, but never provided a functional dma_cache_sync implementations, which seems somewhat odd. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
40 lines
942 B
C
40 lines
942 B
C
#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#include <linux/scatterlist.h>
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#include <asm/dma-coherence.h>
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#include <asm/cache.h>
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#ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
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#include <dma-coherence.h>
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#endif
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extern const struct dma_map_ops *mips_dma_map_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return mips_dma_map_ops;
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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return false;
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return addr + size <= *dev->dma_mask;
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}
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static inline void dma_mark_clean(void *addr, size_t size) {}
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#define arch_setup_dma_ops arch_setup_dma_ops
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 size, const struct iommu_ops *iommu,
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bool coherent)
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{
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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dev->archdata.dma_coherent = coherent;
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#endif
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}
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#endif /* _ASM_DMA_MAPPING_H */
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