c79b954bf6
This patch implements 4 levels of translation tables since 3 levels of page tables with 4KB pages cannot support 40-bit physical address space described in [1] due to the following issue. It is a restriction that kernel logical memory map with 4KB + 3 levels (0xffffffc000000000-0xffffffffffffffff) cannot cover RAM region from 544GB to 1024GB in [1]. Specifically, ARM64 kernel fails to create mapping for this region in map_mem function since __phys_to_virt for this region reaches to address overflow. If SoC design follows the document, [1], over 32GB RAM would be placed from 544GB. Even 64GB system is supposed to use the region from 544GB to 576GB for only 32GB RAM. Naturally, it would reach to enable 4 levels of page tables to avoid hacking __virt_to_phys and __phys_to_virt. However, it is recommended 4 levels of page table should be only enabled if memory map is too sparse or there is about 512GB RAM. References ---------- [1]: Principles of ARM Memory Maps, White Paper, Issue C Signed-off-by: Jungseok Lee <jays.lee@samsung.com> Reviewed-by: Sungjinn Chung <sungjinn.chung@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Steve Capper <steve.capper@linaro.org> [catalin.marinas@arm.com: MEMBLOCK_INITIAL_LIMIT removed, same as PUD_SIZE] [catalin.marinas@arm.com: early_ioremap_init() updated for 4 levels] [catalin.marinas@arm.com: 48-bit VA depends on BROKEN until KVM is fixed] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
137 lines
3.3 KiB
C
137 lines
3.3 KiB
C
/*
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* Based on arch/arm/include/asm/pgalloc.h
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*
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* Copyright (C) 2000-2001 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_PGALLOC_H
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#define __ASM_PGALLOC_H
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#include <asm/pgtable-hwdef.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#define check_pgt_cache() do { } while (0)
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#ifndef CONFIG_ARM64_2_LEVELS
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
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}
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static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
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{
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BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
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free_page((unsigned long)pmd);
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}
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static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
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{
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set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
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}
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#endif /* CONFIG_ARM64_2_LEVELS */
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#ifdef CONFIG_ARM64_4_LEVELS
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static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
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}
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static inline void pud_free(struct mm_struct *mm, pud_t *pud)
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{
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BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
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free_page((unsigned long)pud);
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}
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static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
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{
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set_pgd(pgd, __pgd(__pa(pud) | PUD_TYPE_TABLE));
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}
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#endif /* CONFIG_ARM64_4_LEVELS */
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
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#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO)
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static inline pte_t *
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pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
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{
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return (pte_t *)__get_free_page(PGALLOC_GFP);
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}
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static inline pgtable_t
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pte_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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struct page *pte;
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pte = alloc_pages(PGALLOC_GFP, 0);
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if (!pte)
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return NULL;
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if (!pgtable_page_ctor(pte)) {
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__free_page(pte);
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return NULL;
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}
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return pte;
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}
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/*
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* Free a PTE table.
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*/
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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if (pte)
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free_page((unsigned long)pte);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
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{
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pgtable_page_dtor(pte);
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__free_page(pte);
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}
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static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
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pmdval_t prot)
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{
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set_pmd(pmdp, __pmd(pte | prot));
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}
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/*
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* Populate the pmdp entry with a pointer to the pte. This pmd is part
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* of the mm address space.
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*/
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static inline void
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pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
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{
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/*
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* The pmd must be loaded with the physical address of the PTE table
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*/
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__pmd_populate(pmdp, __pa(ptep), PMD_TYPE_TABLE);
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}
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static inline void
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pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
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{
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__pmd_populate(pmdp, page_to_phys(ptep), PMD_TYPE_TABLE);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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#endif
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