c65e6815db
Add the new kernel command line parameter 'dfltcc=' to configure s390
zlib hardware support.
Format: { on | off | def_only | inf_only | always }
on: s390 zlib hardware support for compression on
level 1 and decompression (default)
off: No s390 zlib hardware support
def_only: s390 zlib hardware support for deflate
only (compression on level 1)
inf_only: s390 zlib hardware support for inflate
only (decompression)
always: Same as 'on' but ignores the selected compression
level always using hardware support (used for debugging)
Link: http://lkml.kernel.org/r/20200103223334.20669-5-zaslonko@linux.ibm.com
Signed-off-by: Mikhail Zaslonko <zaslonko@linux.ibm.com>
Cc: Chris Mason <clm@fb.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: David Sterba <dsterba@suse.com>
Cc: Eduard Shishkin <edward6@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ilya Leoshkevich <iii@linux.ibm.com>
Cc: Josef Bacik <josef@toxicpanda.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
113 lines
2.5 KiB
C
113 lines
2.5 KiB
C
// SPDX-License-Identifier: Zlib
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#ifndef DFLTCC_UTIL_H
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#define DFLTCC_UTIL_H
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#include <linux/zutil.h>
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#include <asm/facility.h>
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#include <asm/setup.h>
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/*
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* C wrapper for the DEFLATE CONVERSION CALL instruction.
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*/
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typedef enum {
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DFLTCC_CC_OK = 0,
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DFLTCC_CC_OP1_TOO_SHORT = 1,
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DFLTCC_CC_OP2_TOO_SHORT = 2,
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DFLTCC_CC_OP2_CORRUPT = 2,
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DFLTCC_CC_AGAIN = 3,
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} dfltcc_cc;
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#define DFLTCC_QAF 0
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#define DFLTCC_GDHT 1
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#define DFLTCC_CMPR 2
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#define DFLTCC_XPND 4
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#define HBT_CIRCULAR (1 << 7)
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#define HB_BITS 15
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#define HB_SIZE (1 << HB_BITS)
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#define DFLTCC_FACILITY 151
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static inline dfltcc_cc dfltcc(
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int fn,
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void *param,
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Byte **op1,
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size_t *len1,
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const Byte **op2,
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size_t *len2,
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void *hist
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)
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{
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Byte *t2 = op1 ? *op1 : NULL;
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size_t t3 = len1 ? *len1 : 0;
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const Byte *t4 = op2 ? *op2 : NULL;
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size_t t5 = len2 ? *len2 : 0;
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register int r0 __asm__("r0") = fn;
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register void *r1 __asm__("r1") = param;
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register Byte *r2 __asm__("r2") = t2;
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register size_t r3 __asm__("r3") = t3;
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register const Byte *r4 __asm__("r4") = t4;
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register size_t r5 __asm__("r5") = t5;
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int cc;
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__asm__ volatile(
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".insn rrf,0xb9390000,%[r2],%[r4],%[hist],0\n"
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"ipm %[cc]\n"
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: [r2] "+r" (r2)
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, [r3] "+r" (r3)
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, [r4] "+r" (r4)
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, [r5] "+r" (r5)
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, [cc] "=r" (cc)
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: [r0] "r" (r0)
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, [r1] "r" (r1)
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, [hist] "r" (hist)
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: "cc", "memory");
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t2 = r2; t3 = r3; t4 = r4; t5 = r5;
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if (op1)
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*op1 = t2;
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if (len1)
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*len1 = t3;
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if (op2)
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*op2 = t4;
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if (len2)
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*len2 = t5;
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return (cc >> 28) & 3;
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}
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static inline int is_bit_set(
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const char *bits,
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int n
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)
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{
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return bits[n / 8] & (1 << (7 - (n % 8)));
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}
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static inline void turn_bit_off(
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char *bits,
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int n
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)
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{
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bits[n / 8] &= ~(1 << (7 - (n % 8)));
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}
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static inline int dfltcc_are_params_ok(
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int level,
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uInt window_bits,
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int strategy,
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uLong level_mask
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)
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{
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return (level_mask & (1 << level)) != 0 &&
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(window_bits == HB_BITS) &&
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(strategy == Z_DEFAULT_STRATEGY);
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}
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static inline int is_dfltcc_enabled(void)
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{
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return (zlib_dfltcc_support != ZLIB_DFLTCC_DISABLED &&
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test_facility(DFLTCC_FACILITY));
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}
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char *oesc_msg(char *buf, int oesc);
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#endif /* DFLTCC_UTIL_H */
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