Files
android_kernel_xiaomi_sm8450/drivers/clk/meson
Martin Blumenstingl c39c24c1ca clk: meson: meson8b: add the cts_mclk_i958 clocks
Add the SPDIF master clock also referred as cts_mclk_i958. The setup for
this clock is identical to GXBB, so this ports commit 3c277c247e
("clk: meson: gxbb: add cts_mclk_i958") to the Meson8/Meson8b/Meson8m2
clock driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-06-11 11:02:04 +02:00
..
2019-05-20 12:20:16 +02:00
2019-05-20 12:20:16 +02:00