bfc18e389c
While __atomic_add_unless() was originally intended as a building-block
for atomic_add_unless(), it's now used in a number of places around the
kernel. It's the only common atomic operation named __atomic*(), rather
than atomic_*(), and for consistency it would be better named
atomic_fetch_add_unless().
This lack of consistency is slightly confusing, and gets in the way of
scripting atomics. Given that, let's clean things up and promote it to
an official part of the atomics API, in the form of
atomic_fetch_add_unless().
This patch converts definitions and invocations over to the new name,
including the instrumented version, using the following script:
----
git grep -w __atomic_add_unless | while read line; do
sed -i '{s/\<__atomic_add_unless\>/atomic_fetch_add_unless/}' "${line%%:*}";
done
git grep -w __arch_atomic_add_unless | while read line; do
sed -i '{s/\<__arch_atomic_add_unless\>/arch_atomic_fetch_add_unless/}' "${line%%:*}";
done
----
Note that we do not have atomic{64,_long}_fetch_add_unless(), which will
be introduced by later patches.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Palmer Dabbelt <palmer@sifive.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/lkml/20180621121321.4761-2-mark.rutland@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
230 lines
4.9 KiB
C
230 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_M68K_ATOMIC__
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#define __ARCH_M68K_ATOMIC__
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#include <linux/types.h>
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#include <linux/irqflags.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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/*
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* We do not have SMP m68k systems, so we don't have to deal with that.
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) READ_ONCE((v)->counter)
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#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
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/*
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* The ColdFire parts cannot do some immediate to memory operations,
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* so for them we do not specify the "i" asm constraint.
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*/
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#ifdef CONFIG_COLDFIRE
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#define ASM_DI "d"
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#else
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#define ASM_DI "di"
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#endif
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#define ATOMIC_OP(op, c_op, asm_op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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__asm__ __volatile__(#asm_op "l %1,%0" : "+m" (*v) : ASM_DI (i));\
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} \
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#ifdef CONFIG_RMW_INSNS
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#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
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static inline int atomic_##op##_return(int i, atomic_t *v) \
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{ \
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int t, tmp; \
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\
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__asm__ __volatile__( \
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"1: movel %2,%1\n" \
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" " #asm_op "l %3,%1\n" \
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" casl %2,%1,%0\n" \
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" jne 1b" \
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: "+m" (*v), "=&d" (t), "=&d" (tmp) \
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: "g" (i), "2" (atomic_read(v))); \
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return t; \
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}
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#define ATOMIC_FETCH_OP(op, c_op, asm_op) \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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int t, tmp; \
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\
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__asm__ __volatile__( \
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"1: movel %2,%1\n" \
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" " #asm_op "l %3,%1\n" \
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" casl %2,%1,%0\n" \
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" jne 1b" \
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: "+m" (*v), "=&d" (t), "=&d" (tmp) \
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: "g" (i), "2" (atomic_read(v))); \
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return tmp; \
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}
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#else
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#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
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static inline int atomic_##op##_return(int i, atomic_t * v) \
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{ \
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unsigned long flags; \
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int t; \
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\
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local_irq_save(flags); \
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t = (v->counter c_op i); \
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local_irq_restore(flags); \
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\
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return t; \
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}
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#define ATOMIC_FETCH_OP(op, c_op, asm_op) \
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static inline int atomic_fetch_##op(int i, atomic_t * v) \
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{ \
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unsigned long flags; \
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int t; \
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\
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local_irq_save(flags); \
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t = v->counter; \
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v->counter c_op i; \
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local_irq_restore(flags); \
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\
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return t; \
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}
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#endif /* CONFIG_RMW_INSNS */
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#define ATOMIC_OPS(op, c_op, asm_op) \
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ATOMIC_OP(op, c_op, asm_op) \
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ATOMIC_OP_RETURN(op, c_op, asm_op) \
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ATOMIC_FETCH_OP(op, c_op, asm_op)
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ATOMIC_OPS(add, +=, add)
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ATOMIC_OPS(sub, -=, sub)
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op, c_op, asm_op) \
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ATOMIC_OP(op, c_op, asm_op) \
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ATOMIC_FETCH_OP(op, c_op, asm_op)
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ATOMIC_OPS(and, &=, and)
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ATOMIC_OPS(or, |=, or)
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ATOMIC_OPS(xor, ^=, eor)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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static inline void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__("addql #1,%0" : "+m" (*v));
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}
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static inline void atomic_dec(atomic_t *v)
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{
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__asm__ __volatile__("subql #1,%0" : "+m" (*v));
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}
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static inline int atomic_dec_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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static inline int atomic_dec_and_test_lt(atomic_t *v)
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{
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char c;
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__asm__ __volatile__(
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"subql #1,%1; slt %0"
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: "=d" (c), "=m" (*v)
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: "m" (*v));
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return c != 0;
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}
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static inline int atomic_inc_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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#ifdef CONFIG_RMW_INSNS
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#else /* !CONFIG_RMW_INSNS */
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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if (prev == old)
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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static inline int atomic_xchg(atomic_t *v, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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#endif /* !CONFIG_RMW_INSNS */
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#define atomic_dec_return(v) atomic_sub_return(1, (v))
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#define atomic_inc_return(v) atomic_add_return(1, (v))
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static inline int atomic_sub_and_test(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subl %2,%1; seq %0"
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: "=d" (c), "+m" (*v)
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: ASM_DI (i));
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return c != 0;
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}
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static inline int atomic_add_negative(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addl %2,%1; smi %0"
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: "=d" (c), "+m" (*v)
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: ASM_DI (i));
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return c != 0;
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}
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static __inline__ int atomic_fetch_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c;
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}
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#endif /* __ARCH_M68K_ATOMIC __ */
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