xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
be055b2f89b5842f41363b5655a33dffb51a8294
android_kernel_xiaomi_sm8450/arch/parisc/kernel/cache.c
John David Anglin 027f27c4ec parisc: disable preemption while flushing D- or I-caches through TMPALIAS region 
It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-02-20 22:50:38 +01:00

18 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink