d027db132b
Pull ARM SoC updates from Olof Johansson: "This contains the bulk of new SoC development for this merge window. Two new platforms have been added, the sunxi platforms (Allwinner A1x SoCs) by Maxime Ripard, and a generic Broadcom platform for a new series of ARMv7 platforms from them, where the hope is that we can keep the platform code generic enough to have them all share one mach directory. The new Broadcom platform is contributed by Christian Daudt. Highbank has grown support for Calxeda's next generation of hardware, ECX-2000. clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also taken on maintainership of the platform. Beyond this there has been a bunch of work from a number of people on converting more platforms to IRQ domains, pinctrl conversion, cleanup and general feature enablement across most of the active platforms." Fix up trivial conflicts as per Olof. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits) mfd: vexpress-sysreg: Remove LEDs code irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids irq: versatile: delete dangling variable ARM: sunxi: add missing include for mdelay() ARM: EXYNOS: Avoid early use of of_machine_is_compatible() ARM: dts: add node for PL330 MDMA1 controller for exynos4 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 ARM: EXYNOS: add UART3 to DEBUG_LL ports ARM: S3C24XX: Add clkdev entry for camif-upll clock ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers ARM: sunxi: Add missing sun4i.dtsi file pinctrl: samsung: Do not initialise statics to 0 ARM i.MX6: remove gate_mask from pllv3 ARM i.MX6: Fix ethernet PLL clocks ARM i.MX6: rename PLLs according to datasheet ARM i.MX6: Add pwm support ARM i.MX51: Add pwm support ARM i.MX53: Add pwm support ARM: mx5: Replace clk_register_clkdev with clock DT lookup ...
50 lines
1.4 KiB
C
50 lines
1.4 KiB
C
/*
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* DaVinci serial device definitions
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASM_ARCH_SERIAL_H
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#define __ASM_ARCH_SERIAL_H
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#include <asm/memory.h>
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#include <mach/hardware.h>
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#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
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#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
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#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
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#define DA8XX_UART0_BASE (IO_PHYS + 0x042000)
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#define DA8XX_UART1_BASE (IO_PHYS + 0x10c000)
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#define DA8XX_UART2_BASE (IO_PHYS + 0x10d000)
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#define TNETV107X_UART0_BASE 0x08108100
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#define TNETV107X_UART1_BASE 0x08088400
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#define TNETV107X_UART2_BASE 0x08108300
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#define TNETV107X_UART0_VIRT IOMEM(0xfee08100)
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#define TNETV107X_UART1_VIRT IOMEM(0xfed88400)
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#define TNETV107X_UART2_VIRT IOMEM(0xfee08300)
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/* DaVinci UART register offsets */
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#define UART_DAVINCI_PWREMU 0x0c
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#define UART_DM646X_SCR 0x10
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#define UART_DM646X_SCR_TX_WATERMARK 0x08
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#ifndef __ASSEMBLY__
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struct davinci_uart_config {
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/* Bit field of UARTs present; bit 0 --> UART0 */
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unsigned int enabled_uarts;
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};
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extern int davinci_serial_init(struct davinci_uart_config *);
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extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate);
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#endif
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#endif /* __ASM_ARCH_SERIAL_H */
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