bab588fcfb
Pull ARM SoC-specific updates from Arnd Bergmann:
"This is a larger set of new functionality for the existing SoC
families, including:
- vt8500 gains support for new CPU cores, notably the Cortex-A9 based
wm8850
- prima2 gains support for the "marco" SoC family, its SMP based
cousin
- tegra gains support for the new Tegra4 (Tegra114) family
- socfpga now supports a newer version of the hardware including SMP
- i.mx31 and bcm2835 are now using DT probing for their clocks
- lots of updates for sh-mobile
- OMAP updates for clocks, power management and USB
- i.mx6q and tegra now support cpuidle
- kirkwood now supports PCIe hot plugging
- tegra clock support is updated
- tegra USB PHY probing gets implemented diffently"
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
ARM: prima2: remove duplicate v7_invalidate_l1
ARM: shmobile: r8a7779: Correct TMU clock support again
ARM: prima2: fix __init section for cpu hotplug
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
arm: socfpga: Add SMP support for actual socfpga harware
arm: Add v7_invalidate_l1 to cache-v7.S
arm: socfpga: Add entries to enable make dtbs socfpga
arm: socfpga: Add new device tree source for actual socfpga HW
ARM: tegra: sort Kconfig selects for Tegra114
ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
ARM: tegra: Fix build error for gic update
ARM: tegra: remove empty tegra_smp_init_cpus()
ARM: shmobile: Register ARM architected timer
ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
ARM: shmobile: r8a7779: Correct TMU clock support
ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
ARM: mxs: use apbx bus clock to drive the timers on timrotv2
...
38 lines
669 B
C
38 lines
669 B
C
#ifndef __ASMARM_ARCH_SCU_H
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#define __ASMARM_ARCH_SCU_H
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#define SCU_PM_NORMAL 0
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#define SCU_PM_DORMANT 2
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#define SCU_PM_POWEROFF 3
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#ifndef __ASSEMBLER__
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#include <asm/cputype.h>
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static inline bool scu_a9_has_base(void)
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{
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return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
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}
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static inline unsigned long scu_a9_get_base(void)
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{
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unsigned long pa;
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
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return pa;
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}
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unsigned int scu_get_core_count(void __iomem *);
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int scu_power_mode(void __iomem *, unsigned int);
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#ifdef CONFIG_SMP
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void scu_enable(void __iomem *scu_base);
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#else
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static inline void scu_enable(void __iomem *scu_base) {}
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#endif
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#endif
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#endif
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