b8b47bfbe4
These patches rework the pci code for the sh architecture. Currently each board implements some kind of ioport to address mapping. Some boards use generic_io_base others try passing addresses as io ports. This is the first set of patches that try to unify the pci code as much as possible to avoid duplicated code. This will in the end lead to fewer lines board specific code and more generic code. This patch makes sure a struct pci_channel pointer is passed along to various pci functions such as pci_read_reg(), pci_write_reg(), pci_fixup_pcic(), sh7751_pcic_init() and sh7780_pcic_init(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
/*
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* arch/sh/drivers/pci/ops-titan.c
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*
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* Ported to new API by Paul Mundt <lethal@linux-sh.org>
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*
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* Modified from ops-snapgear.c written by David McCullough
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* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* PCI initialization for the Titan boards
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <mach/titan.h>
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#include "pci-sh4.h"
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static char titan_irq_tab[] __initdata = {
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TITAN_IRQ_WAN,
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TITAN_IRQ_LAN,
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TITAN_IRQ_MPCIA,
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TITAN_IRQ_MPCIB,
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TITAN_IRQ_USB,
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};
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int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
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{
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int irq = titan_irq_tab[slot];
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printk("PCI: Mapping TITAN IRQ for slot %d, pin %c to irq %d\n",
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slot, pin - 1 + 'A', irq);
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return irq;
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}
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static struct resource sh7751_io_resource = {
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.name = "SH7751_IO",
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.start = SH7751_PCI_IO_BASE,
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.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
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.flags = IORESOURCE_IO
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};
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static struct resource sh7751_mem_resource = {
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.name = "SH7751_mem",
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.start = SH7751_PCI_MEMORY_BASE,
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.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM
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};
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struct pci_channel board_pci_channels[] = {
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{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
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{ NULL, NULL, NULL, 0, 0 },
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};
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EXPORT_SYMBOL(board_pci_channels);
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static struct sh4_pci_address_map sh7751_pci_map = {
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.window0 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SH7751_MEM_REGION_SIZE*2, /* cs2 and cs3 */
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},
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.window1 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SH7751_MEM_REGION_SIZE*2,
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},
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.flags = SH4_PCIC_NO_RESET,
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};
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int __init pcibios_init_platform(void)
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{
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return sh7751_pcic_init(&board_pci_channels[0], &sh7751_pci_map);
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}
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