Files
android_kernel_xiaomi_sm8450/drivers/pci
Shawn Lin b8ab8e041c PCI: rockchip: Mark RC as common clock architecture
The default value of common clock configuration is zero indicating
Rockchip's RC is using asynchronous clock architecture but actually we are
using common clock.  This will confuse some EP drivers if they need some
different settings referring to this value.

Set the Common Clock Configuration bit in the Link Control Register.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-12-07 15:05:58 -06:00
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