Daniel Jurgens b47bd6ea40 {net, ib}/mlx5: Make cache line size determination at runtime. ...

ARM 64B cache line systems have L1_CACHE_BYTES set to 128.
cache_line_size() will return the correct size.

Fixes: cf50b5efa2fe('net/mlx5_core/ib: New device capabilities
handling.')
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>

Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

2016-10-29 12:00:39 -04:00

..

ah.c

IB/mlx5: Add RoCE fields to Address Vector

2015-12-23 12:07:37 -05:00

cq.c

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma

2016-10-09 17:04:33 -07:00

doorbell.c

IB/mlx5: Fix Mellanox copyright note

2015-04-02 16:33:42 -04:00

gsi.c

IB/mlx5: Fix iteration overrun in GSI qps

2016-08-02 14:32:51 -04:00

ib_virt.c

IB/mlx5: Implement callbacks for manipulating VFs

2016-03-21 17:13:14 -04:00

Kconfig

net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality

2015-05-30 18:24:51 -07:00

mad.c

IB/{core,hw}: Add constant for node_desc

2016-10-07 16:54:34 -04:00

main.c

{net, ib}/mlx5: Make cache line size determination at runtime.

2016-10-29 12:00:39 -04:00

Makefile

IB/mlx5: Implement callbacks for manipulating VFs

2016-03-21 17:13:14 -04:00

mem.c

IB/mlx5: Fix the size parameter to find_first_bit

2016-09-02 13:46:12 -04:00

mlx5_ib.h

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma

2016-10-09 17:04:33 -07:00

mr.c

IB/mlx5: Move and decouple user vendor structures

2016-10-07 16:54:34 -04:00

odp.c

IB/mlx5/odp: Remove deprecated create_singlethread_workqueue

2016-10-07 16:54:29 -04:00

qp.c

{net, ib}/mlx5: Make cache line size determination at runtime.

2016-10-29 12:00:39 -04:00

srq.c

IB/mlx5: Move and decouple user vendor structures

2016-10-07 16:54:34 -04:00