b12d66278d
As seen on the new Raspberry Pi 4 and sta2x11's DMA implementation it is possible for a device configured with 32 bit DMA addresses and a partial DMA mapping located at the end of the address space to overflow. It happens when a higher physical address, not DMAable, is translated to it's DMA counterpart. For example the Raspberry Pi 4, configurable up to 4 GB of memory, has an interconnect capable of addressing the lower 1 GB of physical memory with a DMA offset of 0xc0000000. It transpires that, any attempt to translate physical addresses higher than the first GB will result in an overflow which dma_capable() can't detect as it only checks for addresses bigger then the maximum allowed DMA address. Fix this by verifying in dma_capable() if the DMA address range provided is at any point lower than the minimum possible DMA address on the bus. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Christoph Hellwig <hch@lst.de>
88 lines
2.9 KiB
C
88 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_DMA_DIRECT_H
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#define _LINUX_DMA_DIRECT_H 1
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#include <linux/dma-mapping.h>
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#include <linux/memblock.h> /* for min_low_pfn */
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#include <linux/mem_encrypt.h>
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
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#ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA
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#include <asm/dma-direct.h>
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#else
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static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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dma_addr_t dev_addr = (dma_addr_t)paddr;
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return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
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}
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static inline phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dev_addr)
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{
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phys_addr_t paddr = (phys_addr_t)dev_addr;
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return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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dma_addr_t end = addr + size - 1;
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if (!dev->dma_mask)
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return false;
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if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &&
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min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn)))
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return false;
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return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask);
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}
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#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */
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#ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED
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bool force_dma_unencrypted(struct device *dev);
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#else
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static inline bool force_dma_unencrypted(struct device *dev)
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{
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return false;
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}
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#endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */
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/*
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* If memory encryption is supported, phys_to_dma will set the memory encryption
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* bit in the DMA address, and dma_to_phys will clear it. The raw __phys_to_dma
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* and __dma_to_phys versions should only be used on non-encrypted memory for
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* special occasions like DMA coherent buffers.
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*/
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return __sme_set(__phys_to_dma(dev, paddr));
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return __sme_clr(__dma_to_phys(dev, daddr));
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}
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u64 dma_direct_get_required_mask(struct device *dev);
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void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs);
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void dma_direct_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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void *dma_direct_alloc_pages(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs);
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void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
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gfp_t gfp, unsigned long attrs);
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int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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bool dma_direct_can_mmap(struct device *dev);
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int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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int dma_direct_supported(struct device *dev, u64 mask);
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#endif /* _LINUX_DMA_DIRECT_H */
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