b0e5f742f1
On pSeries platform, the PE state might be temporarily unavailable. In that case, the firmware will return the corresponding wait time. That means the kernel has to wait for appropriate time in order to get the PE state. The patch does the implementation for that. Besides, the function has been abstracted through struct eeh_ops::wait_state so that EEH core components could support multiple platforms in future. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
91 lines
2.8 KiB
C
91 lines
2.8 KiB
C
/*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_PPC_PCI_H
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#define _ASM_POWERPC_PPC_PCI_H
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#ifdef __KERNEL__
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#ifdef CONFIG_PCI
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#include <linux/pci.h>
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#include <asm/pci-bridge.h>
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extern unsigned long isa_io_base;
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extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
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extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
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extern struct list_head hose_list;
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extern void find_and_init_phbs(void);
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extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */
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/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
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#define BUID_HI(buid) upper_32_bits(buid)
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#define BUID_LO(buid) lower_32_bits(buid)
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/* PCI device_node operations */
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struct device_node;
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typedef void *(*traverse_func)(struct device_node *me, void *data);
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void *traverse_pci_devices(struct device_node *start, traverse_func pre,
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void *data);
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extern void pci_devs_phb_init(void);
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extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
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/* From rtas_pci.h */
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extern void init_pci_config_tokens (void);
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extern unsigned long get_phb_buid (struct device_node *);
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extern int rtas_setup_phb(struct pci_controller *phb);
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extern unsigned long pci_probe_only;
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#ifdef CONFIG_EEH
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void pci_addr_cache_insert_device(struct pci_dev *dev);
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void pci_addr_cache_remove_device(struct pci_dev *dev);
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void pci_addr_cache_build(void);
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struct pci_dev *pci_get_device_by_addr(unsigned long addr);
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#define EEH_LOG_TEMP_FAILURE 1
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#define EEH_LOG_PERM_FAILURE 2
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
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int eeh_pci_enable(struct pci_dn *pdn, int function);
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int eeh_reset_pe(struct pci_dn *);
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void eeh_restore_bars(struct pci_dn *);
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void eeh_configure_bridge(struct pci_dn *);
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int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
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int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
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void eeh_mark_slot(struct device_node *dn, int mode_flag);
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void eeh_clear_slot(struct device_node *dn, int mode_flag);
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struct device_node *eeh_find_device_pe(struct device_node *dn);
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void eeh_sysfs_add_device(struct pci_dev *pdev);
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void eeh_sysfs_remove_device(struct pci_dev *pdev);
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static inline const char *eeh_pci_name(struct pci_dev *pdev)
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{
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return pdev ? pci_name(pdev) : "<null>";
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}
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static inline const char *eeh_driver_name(struct pci_dev *pdev)
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{
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return (pdev && pdev->driver) ? pdev->driver->name : "<null>";
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}
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#endif /* CONFIG_EEH */
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#else /* CONFIG_PCI */
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static inline void find_and_init_phbs(void) { }
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static inline void init_pci_config_tokens(void) { }
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#endif /* !CONFIG_PCI */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PPC_PCI_H */
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