
Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper: - Armada 370/XP suspend/resume support - mvebu SoC driver suspend/resume support - irqchip - clocksource - mbus - clk * tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu: ARM: mvebu: add SDRAM controller description for Armada XP ARM: mvebu: adjust mbus controller description on Armada 370/XP ARM: mvebu: add suspend/resume DT information for Armada XP GP ARM: mvebu: synchronize secondary CPU clocks on resume ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume ARM: mvebu: Armada XP GP specific suspend/resume code ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume ARM: mvebu: implement suspend/resume support for Armada XP clk: mvebu: add suspend/resume for gatable clocks bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration bus: mvebu-mbus: suspend/resume support clocksource: time-armada-370-xp: add suspend/resume support irqchip: armada-370-xp: Add suspend/resume support Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller Signed-off-by: Arnd Bergmann <arnd@arndb.de>
25 lines
835 B
C
25 lines
835 B
C
/*
|
|
* Power Management Service Unit (PMSU) support for Armada 370/XP platforms.
|
|
*
|
|
* Copyright (C) 2012 Marvell
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#ifndef __MACH_MVEBU_PMSU_H
|
|
#define __MACH_MVEBU_PMSU_H
|
|
|
|
int armada_xp_boot_cpu(unsigned int cpu_id, void *phys_addr);
|
|
int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
|
|
unsigned int crypto_eng_attribute,
|
|
phys_addr_t resume_addr_reg);
|
|
|
|
void mvebu_v7_pmsu_idle_exit(void);
|
|
void armada_370_xp_cpu_resume(void);
|
|
|
|
int armada_370_xp_pmsu_idle_enter(unsigned long deepidle);
|
|
int armada_38x_do_cpu_suspend(unsigned long deepidle);
|
|
#endif /* __MACH_370_XP_PMSU_H */
|