
It's a waste for the four X86_FEATURE_CQM_* feature bits to occupy two whole feature bits words. To better utilize feature words, re-define word 11 to host scattered features and move the four X86_FEATURE_CQM_* features into Linux defined word 11. More scattered features can be added in word 11 in the future. Rename leaf 11 in cpuid_leafs to CPUID_LNX_4 to reflect it's a Linux-defined leaf. Rename leaf 12 as CPUID_DUMMY which will be replaced by a meaningful name in the next patch when CPUID.7.1:EAX occupies world 12. Maximum number of RMID and cache occupancy scale are retrieved from CPUID.0xf.1 after scattered CQM features are enumerated. Carve out the code into a separate function. KVM doesn't support resctrl now. So it's safe to move the X86_FEATURE_CQM_* features to scattered features word 11 for KVM. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Aaron Lewis <aaronlewis@google.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Babu Moger <babu.moger@amd.com> Cc: "Chang S. Bae" <chang.seok.bae@intel.com> Cc: "Sean J Christopherson" <sean.j.christopherson@intel.com> Cc: Frederic Weisbecker <frederic@kernel.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jann Horn <jannh@google.com> Cc: Juergen Gross <jgross@suse.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: kvm ML <kvm@vger.kernel.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Nadav Amit <namit@vmware.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Pavel Tatashin <pasha.tatashin@oracle.com> Cc: Peter Feiner <pfeiner@google.com> Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: Ravi V Shankar <ravi.v.shankar@intel.com> Cc: Sherry Hurwitz <sherry.hurwitz@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Lendacky <Thomas.Lendacky@amd.com> Cc: x86 <x86@kernel.org> Link: https://lkml.kernel.org/r/1560794416-217638-2-git-send-email-fenghua.yu@intel.com
125 lines
4.1 KiB
C
125 lines
4.1 KiB
C
/* Declare dependencies between CPUIDs */
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <asm/cpufeature.h>
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struct cpuid_dep {
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unsigned int feature;
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unsigned int depends;
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};
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/*
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* Table of CPUID features that depend on others.
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*
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* This only includes dependencies that can be usefully disabled, not
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* features part of the base set (like FPU).
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*
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* Note this all is not __init / __initdata because it can be
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* called from cpu hotplug. It shouldn't do anything in this case,
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* but it's difficult to tell that to the init reference checker.
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*/
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static const struct cpuid_dep cpuid_deps[] = {
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{ X86_FEATURE_XSAVEOPT, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XSAVEC, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XSAVES, X86_FEATURE_XSAVE },
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{ X86_FEATURE_AVX, X86_FEATURE_XSAVE },
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{ X86_FEATURE_PKU, X86_FEATURE_XSAVE },
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{ X86_FEATURE_MPX, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XGETBV1, X86_FEATURE_XSAVE },
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{ X86_FEATURE_FXSR_OPT, X86_FEATURE_FXSR },
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{ X86_FEATURE_XMM, X86_FEATURE_FXSR },
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{ X86_FEATURE_XMM2, X86_FEATURE_XMM },
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{ X86_FEATURE_XMM3, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM4_1, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM4_2, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM3, X86_FEATURE_XMM2 },
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{ X86_FEATURE_PCLMULQDQ, X86_FEATURE_XMM2 },
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{ X86_FEATURE_SSSE3, X86_FEATURE_XMM2, },
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{ X86_FEATURE_F16C, X86_FEATURE_XMM2, },
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{ X86_FEATURE_AES, X86_FEATURE_XMM2 },
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{ X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 },
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{ X86_FEATURE_FMA, X86_FEATURE_AVX },
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{ X86_FEATURE_AVX2, X86_FEATURE_AVX, },
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{ X86_FEATURE_AVX512F, X86_FEATURE_AVX, },
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{ X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512PF, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512ER, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512CD, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512DQ, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512BW, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_GFNI, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_VAES, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F },
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{ X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC },
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{ X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC },
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{ X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC },
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{}
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};
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static inline void clear_feature(struct cpuinfo_x86 *c, unsigned int feature)
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{
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/*
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* Note: This could use the non atomic __*_bit() variants, but the
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* rest of the cpufeature code uses atomics as well, so keep it for
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* consistency. Cleanup all of it separately.
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*/
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if (!c) {
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clear_cpu_cap(&boot_cpu_data, feature);
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set_bit(feature, (unsigned long *)cpu_caps_cleared);
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} else {
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clear_bit(feature, (unsigned long *)c->x86_capability);
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}
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}
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/* Take the capabilities and the BUG bits into account */
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#define MAX_FEATURE_BITS ((NCAPINTS + NBUGINTS) * sizeof(u32) * 8)
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static void do_clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature)
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{
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DECLARE_BITMAP(disable, MAX_FEATURE_BITS);
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const struct cpuid_dep *d;
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bool changed;
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if (WARN_ON(feature >= MAX_FEATURE_BITS))
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return;
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clear_feature(c, feature);
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/* Collect all features to disable, handling dependencies */
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memset(disable, 0, sizeof(disable));
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__set_bit(feature, disable);
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/* Loop until we get a stable state. */
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do {
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changed = false;
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for (d = cpuid_deps; d->feature; d++) {
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if (!test_bit(d->depends, disable))
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continue;
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if (__test_and_set_bit(d->feature, disable))
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continue;
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changed = true;
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clear_feature(c, d->feature);
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}
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} while (changed);
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}
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void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature)
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{
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do_clear_cpu_cap(c, feature);
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}
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void setup_clear_cpu_cap(unsigned int feature)
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{
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do_clear_cpu_cap(NULL, feature);
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}
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