Tony Cheng ab7044d0d1 drm/amd/display: refactor clk_resync to avoid assertion ...

- not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2017-09-26 17:10:52 -04:00

..

acp

drm: amd: remove broken include path

2017-03-14 19:19:44 -04:00

amdgpu

drm/amd/display: Remove dc_target object

2017-09-26 17:09:40 -04:00

amdkfd

drm/amdkfd: Use PASID manager from KGD

2017-09-26 13:07:04 -04:00

display

drm/amd/display: refactor clk_resync to avoid assertion

2017-09-26 17:10:52 -04:00

include

drm/amdgpu: add cgs query info of pci bus devfn

2017-09-26 15:14:16 -04:00

lib

drm/amd: Closed hash table with low overhead (v2)

2017-09-26 14:53:19 -04:00

powerplay

drm/amd/powerplay: delete dead code in smumgr

2017-09-26 15:14:36 -04:00

scheduler

drm/amdgpu: discard commands of killed processes

2017-08-29 15:27:42 -04:00