Files
android_kernel_xiaomi_sm8450/drivers/gpu/drm/amd
Frank Min ab2b2e4f8b drm/amdgpu: Clear vce&uvd ring wptr for SRIOV
MMSCH FW need to get the wptr from 0 after it get the mailbox request
from driver, since every time kick the mailbox, mmsch thinks that it
is the first time engine start to initialize.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-15 14:45:45 -04:00
..
2017-03-14 19:19:44 -04:00