da779b4011
The patch adds the supplements in the dt-binding document for MediaTek MT7622 SoC with extra SGMII system controller and relevant clock consumers listed as the requirements for those SoCs equipped with the SGMII circuit. Also, add the missing binding information for MT7623 SoC here which relies on the fallback binding of MT2701. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
89 lines
2.8 KiB
Plaintext
89 lines
2.8 KiB
Plaintext
MediaTek Frame Engine Ethernet controller
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=========================================
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The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs
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have dual GMAC each represented by a child node..
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* Ethernet controller node
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Required properties:
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- compatible: Should be
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"mediatek,mt2701-eth": for MT2701 SoC
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"mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC
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"mediatek,mt7622-eth": for MT7622 SoC
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- reg: Address and length of the register set for the device
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- interrupts: Should contain the three frame engines interrupts in numeric
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order. These are fe_int0, fe_int1 and fe_int2.
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- clocks: the clock used by the core
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- clock-names: the names of the clock listed in the clocks property. These are
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"ethif", "esw", "gp2", "gp1" : For MT2701 and MT7623 SoC
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"ethif", "esw", "gp0", "gp1", "gp2", "sgmii_tx250m", "sgmii_rx250m",
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"sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll" : For MT7622 SoC
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- power-domains: phandle to the power domain that the ethernet is part of
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- resets: Should contain a phandle to the ethsys reset signal
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- reset-names: Should contain the reset signal name "eth"
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- mediatek,ethsys: phandle to the syscon node that handles the port setup
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- mediatek,sgmiisys: phandle to the syscon node that handles the SGMII setup
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which is required for those SoCs equipped with SGMII such as MT7622 SoC.
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- mediatek,pctl: phandle to the syscon node that handles the ports slew rate
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and driver current
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Optional properties:
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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* Ethernet MAC node
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Required properties:
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- compatible: Should be "mediatek,eth-mac"
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- reg: The number of the MAC
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- phy-handle: see ethernet.txt file in the same directory and
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the phy-mode "trgmii" required being provided when reg
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is equal to 0 and the MAC uses fixed-link to connect
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with internal switch such as MT7530.
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Example:
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eth: ethernet@1b100000 {
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compatible = "mediatek,mt7623-eth";
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reg = <0 0x1b100000 0 0x20000>;
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clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
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<ðsys CLK_ETHSYS_ESW>,
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<ðsys CLK_ETHSYS_GP2>,
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<ðsys CLK_ETHSYS_GP1>;
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clock-names = "ethif", "esw", "gp2", "gp1";
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interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
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GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
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GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
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resets = <ðsys MT2701_ETHSYS_ETH_RST>;
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reset-names = "eth";
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mediatek,ethsys = <ðsys>;
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mediatek,pctl = <&syscfg_pctl_a>;
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#address-cells = <1>;
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#size-cells = <0>;
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gmac1: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-handle = <&phy0>;
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};
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gmac2: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-handle = <&phy1>;
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};
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mdio-bus {
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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phy-mode = "rgmii";
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};
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};
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};
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