a95acec16d
Because the HDLCD driver acts as a component master it can end up enabling the runtime PM functionality before the encoders are initialised. This can cause crashes if the component slave never probes (missing module) or if the PM operations kick in before the probe finishes. Move the enabling of the runtime PM after the component master has finished collecting the slave components and use the DRM atomic helpers to suspend and resume the device. Tested-by: Robin Murphy <Robin.Murphy@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
42 lines
966 B
C
42 lines
966 B
C
/*
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* ARM HDLCD Controller register definition
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*/
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#ifndef __HDLCD_DRV_H__
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#define __HDLCD_DRV_H__
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struct hdlcd_drm_private {
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void __iomem *mmio;
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struct clk *clk;
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struct drm_fbdev_cma *fbdev;
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struct drm_framebuffer *fb;
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struct list_head event_list;
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struct drm_crtc crtc;
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struct drm_plane *plane;
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struct drm_atomic_state *state;
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#ifdef CONFIG_DEBUG_FS
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atomic_t buffer_underrun_count;
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atomic_t bus_error_count;
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atomic_t vsync_count;
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atomic_t dma_end_count;
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#endif
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};
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#define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc)
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static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd,
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unsigned int reg, u32 value)
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{
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writel(value, hdlcd->mmio + reg);
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}
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static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
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{
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return readl(hdlcd->mmio + reg);
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}
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int hdlcd_setup_crtc(struct drm_device *dev);
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void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
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#endif /* __HDLCD_DRV_H__ */
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