8945e37e10
Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
140 lines
2.7 KiB
Plaintext
140 lines
2.7 KiB
Plaintext
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm7125";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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mips-hpt-frequency = <202500000>;
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cpu@0 {
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compatible = "brcm,bmips4380";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4380";
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device_type = "cpu";
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reg = <1>;
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};
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};
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aliases {
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uart0 = &uart0;
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};
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cpu_intc: cpu_intc {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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clocks {
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uart_clk: uart_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <81000000>;
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};
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};
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rdb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0 0x10000000 0x01000000>;
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periph_intc: periph_intc@441400 {
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compatible = "brcm,bcm7038-l1-intc";
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reg = <0x441400 0x30>, <0x441600 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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sun_l2_intc: sun_l2_intc@401800 {
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compatible = "brcm,l2-intc";
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reg = <0x401800 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <23>;
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};
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gisb-arb@400000 {
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compatible = "brcm,bcm7400-gisb-arb";
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reg = <0x400000 0xdc>;
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native-endian;
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interrupt-parent = <&sun_l2_intc>;
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interrupts = <0>, <2>;
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brcm,gisb-arb-master-mask = <0x2f7>;
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brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
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"bsp_0", "rdc_0", "rptd_0",
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"avd_0", "jtag_0";
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};
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upg_irq0_intc: upg_irq0_intc@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <18>;
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};
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
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reg = <0x404000 0x60c>;
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little-endian;
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};
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reboot {
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compatible = "brcm,bcm7038-reboot";
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syscon = <&sun_top_ctrl 0x8 0x14>;
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};
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uart0: serial@406b00 {
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compatible = "ns16550a";
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reg = <0x406b00 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <21>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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ehci0: usb@488300 {
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compatible = "brcm,bcm7125-ehci", "generic-ehci";
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reg = <0x488300 0x100>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <60>;
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status = "disabled";
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};
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ohci0: usb@488400 {
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compatible = "brcm,bcm7125-ohci", "generic-ohci";
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reg = <0x488400 0x100>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <61>;
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status = "disabled";
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};
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};
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};
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