Hai Li a4df68fa23 drm/msm/dsi: Add new method to calculate 14nm PHY timings ...

The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

2017-02-06 11:28:45 -05:00

..

phy

drm/msm/dsi: Add new method to calculate 14nm PHY timings

2017-02-06 11:28:45 -05:00

pll

drm/msm: Set CLK_IGNORE_UNUSED flag for PLL clocks

2016-11-02 10:48:09 -04:00

dsi_cfg.c

drm/msm/dsi: Add 8x96 info in dsi_cfg

2017-02-06 11:28:44 -05:00

dsi_cfg.h

drm/msm/dsi: Add 8x96 info in dsi_cfg

2017-02-06 11:28:44 -05:00

dsi_host.c

drm/msm/dsi: Move PHY operations out of host

2017-02-06 11:28:45 -05:00

dsi_manager.c

drm/msm/dsi: Move PHY operations out of host

2017-02-06 11:28:45 -05:00

dsi.c

drm/msm: Construct only one encoder for DSI

2017-02-06 11:28:43 -05:00

dsi.h

drm/msm/dsi: Move PHY operations out of host

2017-02-06 11:28:45 -05:00

dsi.xml.h

drm/msm/dsi: Update generated headers

2017-02-06 11:28:43 -05:00

mmss_cc.xml.h

drm/msm: update generated headers

2016-11-28 15:14:10 -05:00

sfpb.xml.h

drm/msm: update generated headers

2016-11-28 15:14:10 -05:00