a3f22db510
This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
101 lines
3.2 KiB
C
101 lines
3.2 KiB
C
#ifndef __ARCH_MACH_COMMON_H
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#define __ARCH_MACH_COMMON_H
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extern void shmobile_earlytimer_init(void);
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extern void shmobile_timer_init(void);
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extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div);
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struct twd_local_timer;
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extern void shmobile_setup_console(void);
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extern void shmobile_secondary_vector(void);
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struct clk;
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extern int shmobile_clk_init(void);
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extern void shmobile_handle_irq_intc(struct pt_regs *);
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extern struct platform_suspend_ops shmobile_suspend_ops;
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struct cpuidle_driver;
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struct cpuidle_device;
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extern int shmobile_enter_wfi(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index);
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extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
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extern void sh7372_init_irq(void);
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extern void sh7372_map_io(void);
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extern void sh7372_earlytimer_init(void);
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extern void sh7372_add_early_devices(void);
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extern void sh7372_add_standard_devices(void);
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extern void sh7372_add_early_devices_dt(void);
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extern void sh7372_add_standard_devices_dt(void);
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extern void sh7372_clock_init(void);
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extern void sh7372_pinmux_init(void);
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extern void sh7372_pm_init(void);
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extern void sh7372_resume_core_standby_sysc(void);
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extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
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extern struct clk sh7372_extal1_clk;
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extern struct clk sh7372_extal2_clk;
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extern void sh73a0_init_irq(void);
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extern void sh73a0_init_irq_dt(void);
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extern void sh73a0_map_io(void);
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extern void sh73a0_earlytimer_init(void);
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extern void sh73a0_add_early_devices(void);
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extern void sh73a0_add_standard_devices(void);
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extern void sh73a0_clock_init(void);
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extern void sh73a0_pinmux_init(void);
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extern void sh73a0_pm_init(void);
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extern void sh73a0_secondary_vector(void);
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extern struct clk sh73a0_extal1_clk;
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extern struct clk sh73a0_extal2_clk;
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extern struct clk sh73a0_extcki_clk;
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extern struct clk sh73a0_extalr_clk;
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extern void r8a7740_init_irq(void);
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extern void r8a7740_map_io(void);
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extern void r8a7740_add_early_devices(void);
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extern void r8a7740_add_standard_devices(void);
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extern void r8a7740_clock_init(u8 md_ck);
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extern void r8a7740_pinmux_init(void);
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extern void r8a7740_pm_init(void);
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extern void r8a7779_init_irq(void);
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extern void r8a7779_map_io(void);
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extern void r8a7779_earlytimer_init(void);
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extern void r8a7779_add_early_devices(void);
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extern void r8a7779_add_standard_devices(void);
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extern void r8a7779_clock_init(void);
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extern void r8a7779_pinmux_init(void);
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extern void r8a7779_pm_init(void);
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extern void r8a7740_meram_workaround(void);
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extern void r8a7779_register_twd(void);
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#ifdef CONFIG_SUSPEND
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int shmobile_suspend_init(void);
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#else
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static inline int shmobile_suspend_init(void) { return 0; }
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#endif
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#ifdef CONFIG_CPU_IDLE
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int shmobile_cpuidle_init(void);
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#else
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static inline int shmobile_cpuidle_init(void) { return 0; }
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#endif
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extern void shmobile_cpu_die(unsigned int cpu);
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extern int shmobile_cpu_disable(unsigned int cpu);
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#ifdef CONFIG_HOTPLUG_CPU
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extern int shmobile_cpu_is_dead(unsigned int cpu);
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#else
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static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; }
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#endif
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extern void shmobile_smp_init_cpus(unsigned int ncores);
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static inline void __init shmobile_init_late(void)
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{
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shmobile_suspend_init();
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shmobile_cpuidle_init();
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}
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#endif /* __ARCH_MACH_COMMON_H */
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