9ed7d75b2f
Nadav reported that since this_cpu_read() became asm-volatile, many
smp_processor_id() users generated worse code due to the extra
constraints.
However since smp_processor_id() is reading a stable value, we can use
__this_cpu_read().
While this does reduce text size somewhat, this mostly results in code
movement to .text.unlikely as a result of more/larger .cold.
subfunctions. Less text on the hotpath is good for I$.
$ ./compare.sh defconfig-build1 defconfig-build2 vmlinux.o
setup_APIC_ibs 90 98 -12,+20
force_ibs_eilvt_setup 400 413 -57,+70
pci_serr_error 109 104 -54,+49
pci_serr_error 109 104 -54,+49
unknown_nmi_error 125 120 -76,+71
unknown_nmi_error 125 120 -76,+71
io_check_error 125 132 -97,+104
intel_thermal_interrupt 730 822 +92,+0
intel_init_thermal 951 945 -6,+0
generic_get_mtrr 301 294 -7,+0
generic_get_mtrr 301 294 -7,+0
generic_set_all 749 754 -44,+49
get_fixed_ranges 352 360 -41,+49
x86_acpi_suspend_lowlevel 369 363 -6,+0
check_tsc_sync_source 412 412 -71,+71
irq_migrate_all_off_this_cpu 662 674 -14,+26
clocksource_watchdog 748 748 -113,+113
__perf_event_account_interrupt 204 197 -7,+0
attempt_merge 1748 1741 -7,+0
intel_guc_send_ct 1424 1409 -15,+0
__fini_doorbell 235 231 -4,+0
bdw_set_cdclk 928 923 -5,+0
gen11_dsi_disable 1571 1556 -15,+0
gmbus_wait 493 488 -5,+0
md_make_request 376 369 -7,+0
__split_and_process_bio 543 536 -7,+0
delay_tsc 96 89 -7,+0
hsw_disable_pc8 696 691 -5,+0
tsc_verify_tsc_adjust 215 228 -22,+35
cpuidle_driver_unref 56 49 -7,+0
blk_account_io_completion 159 148 -11,+0
mtrr_wrmsr 95 99 -29,+33
__intel_wait_for_register_fw 401 419 +18,+0
cpuidle_driver_ref 43 36 -7,+0
cpuidle_get_driver 15 8 -7,+0
blk_account_io_done 535 528 -7,+0
irq_migrate_all_off_this_cpu 662 674 -14,+26
check_tsc_sync_source 412 412 -71,+71
irq_wait_for_poll 170 163 -7,+0
generic_end_io_acct 329 322 -7,+0
x86_acpi_suspend_lowlevel 369 363 -6,+0
nohz_balance_enter_idle 198 191 -7,+0
generic_start_io_acct 254 247 -7,+0
blk_account_io_start 341 334 -7,+0
perf_event_task_tick 682 675 -7,+0
intel_init_thermal 951 945 -6,+0
amd_e400_c1e_apic_setup 47 51 -28,+32
setup_APIC_eilvt 350 328 -22,+0
hsw_enable_pc8 1611 1605 -6,+0
total 12985947 12985892 -994,+939
Reported-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
200 lines
5.0 KiB
C
200 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_SMP_H
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#define _ASM_X86_SMP_H
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#include <asm/percpu.h>
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#ifdef CONFIG_X86_LOCAL_APIC
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# include <asm/mpspec.h>
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# include <asm/apic.h>
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# ifdef CONFIG_X86_IO_APIC
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# include <asm/io_apic.h>
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# endif
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#endif
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#include <asm/thread_info.h>
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#include <asm/cpumask.h>
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extern int smp_num_siblings;
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extern unsigned int num_processors;
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DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
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DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);
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/* cpus sharing the last level cache: */
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DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
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DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id);
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DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
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static inline struct cpumask *cpu_llc_shared_mask(int cpu)
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{
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return per_cpu(cpu_llc_shared_map, cpu);
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}
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid);
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid);
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid);
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#endif
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struct task_struct;
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struct smp_ops {
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void (*smp_prepare_boot_cpu)(void);
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void (*smp_prepare_cpus)(unsigned max_cpus);
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void (*smp_cpus_done)(unsigned max_cpus);
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void (*stop_other_cpus)(int wait);
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void (*crash_stop_other_cpus)(void);
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void (*smp_send_reschedule)(int cpu);
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int (*cpu_up)(unsigned cpu, struct task_struct *tidle);
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int (*cpu_disable)(void);
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void (*cpu_die)(unsigned int cpu);
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void (*play_dead)(void);
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void (*send_call_func_ipi)(const struct cpumask *mask);
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void (*send_call_func_single_ipi)(int cpu);
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};
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/* Globals due to paravirt */
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extern void set_cpu_sibling_map(int cpu);
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#ifdef CONFIG_SMP
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extern struct smp_ops smp_ops;
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static inline void smp_send_stop(void)
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{
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smp_ops.stop_other_cpus(0);
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}
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static inline void stop_other_cpus(void)
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{
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smp_ops.stop_other_cpus(1);
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}
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static inline void smp_prepare_boot_cpu(void)
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{
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smp_ops.smp_prepare_boot_cpu();
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}
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static inline void smp_prepare_cpus(unsigned int max_cpus)
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{
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smp_ops.smp_prepare_cpus(max_cpus);
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}
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static inline void smp_cpus_done(unsigned int max_cpus)
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{
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smp_ops.smp_cpus_done(max_cpus);
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}
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static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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return smp_ops.cpu_up(cpu, tidle);
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}
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static inline int __cpu_disable(void)
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{
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return smp_ops.cpu_disable();
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}
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static inline void __cpu_die(unsigned int cpu)
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{
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smp_ops.cpu_die(cpu);
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}
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static inline void play_dead(void)
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{
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smp_ops.play_dead();
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}
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static inline void smp_send_reschedule(int cpu)
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{
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smp_ops.smp_send_reschedule(cpu);
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}
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static inline void arch_send_call_function_single_ipi(int cpu)
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{
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smp_ops.send_call_func_single_ipi(cpu);
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}
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static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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smp_ops.send_call_func_ipi(mask);
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}
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void cpu_disable_common(void);
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void native_smp_prepare_boot_cpu(void);
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void native_smp_prepare_cpus(unsigned int max_cpus);
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void calculate_max_logical_packages(void);
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void native_smp_cpus_done(unsigned int max_cpus);
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int common_cpu_up(unsigned int cpunum, struct task_struct *tidle);
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int native_cpu_up(unsigned int cpunum, struct task_struct *tidle);
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int native_cpu_disable(void);
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int common_cpu_die(unsigned int cpu);
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void native_cpu_die(unsigned int cpu);
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void hlt_play_dead(void);
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void native_play_dead(void);
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void play_dead_common(void);
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void wbinvd_on_cpu(int cpu);
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int wbinvd_on_all_cpus(void);
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void native_send_call_func_ipi(const struct cpumask *mask);
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void native_send_call_func_single_ipi(int cpu);
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void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
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void smp_store_boot_cpu_info(void);
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void smp_store_cpu_info(int id);
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asmlinkage __visible void smp_reboot_interrupt(void);
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__visible void smp_reschedule_interrupt(struct pt_regs *regs);
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__visible void smp_call_function_interrupt(struct pt_regs *regs);
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__visible void smp_call_function_single_interrupt(struct pt_regs *r);
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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#define cpu_acpi_id(cpu) per_cpu(x86_cpu_to_acpiid, cpu)
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/*
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* This function is needed by all SMP systems. It must _always_ be valid
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* from the initial startup. We map APIC_BASE very early in page_setup(),
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* so this is correct in the x86 case.
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*/
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#define raw_smp_processor_id() this_cpu_read(cpu_number)
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#define __smp_processor_id() __this_cpu_read(cpu_number)
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#ifdef CONFIG_X86_32
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extern int safe_smp_processor_id(void);
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#else
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# define safe_smp_processor_id() smp_processor_id()
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#endif
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#else /* !CONFIG_SMP */
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#define wbinvd_on_cpu(cpu) wbinvd()
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static inline int wbinvd_on_all_cpus(void)
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{
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wbinvd();
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return 0;
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}
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#endif /* CONFIG_SMP */
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extern unsigned disabled_cpus;
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#ifdef CONFIG_X86_LOCAL_APIC
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extern int hard_smp_processor_id(void);
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#else /* CONFIG_X86_LOCAL_APIC */
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#define hard_smp_processor_id() 0
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#endif /* CONFIG_X86_LOCAL_APIC */
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#ifdef CONFIG_DEBUG_NMI_SELFTEST
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extern void nmi_selftest(void);
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#else
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#define nmi_selftest() do { } while (0)
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_X86_SMP_H */
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