9bdcf336d0
All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
/*
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* bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
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*
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* All Alchemy development boards (except, of course, the weird PB1000)
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* have a few registers in a CPLD with standardised layout; they mostly
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* only differ in base address.
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* All registers are 16bits wide with 32bit spacing.
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*/
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/mach-db1x00/bcsr.h>
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static struct bcsr_reg {
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void __iomem *raddr;
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spinlock_t lock;
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} bcsr_regs[BCSR_CNT];
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void __init bcsr_init(unsigned long bcsr1_phys, unsigned long bcsr2_phys)
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{
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int i;
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bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys));
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bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys));
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for (i = 0; i < BCSR_CNT; i++) {
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if (i >= BCSR_HEXLEDS)
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bcsr_regs[i].raddr = (void __iomem *)bcsr2_phys +
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(0x04 * (i - BCSR_HEXLEDS));
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else
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bcsr_regs[i].raddr = (void __iomem *)bcsr1_phys +
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(0x04 * i);
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spin_lock_init(&bcsr_regs[i].lock);
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}
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}
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unsigned short bcsr_read(enum bcsr_id reg)
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{
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unsigned short r;
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unsigned long flags;
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spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
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r = __raw_readw(bcsr_regs[reg].raddr);
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spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
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return r;
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}
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EXPORT_SYMBOL_GPL(bcsr_read);
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void bcsr_write(enum bcsr_id reg, unsigned short val)
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{
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unsigned long flags;
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spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
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__raw_writew(val, bcsr_regs[reg].raddr);
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wmb();
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spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
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}
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EXPORT_SYMBOL_GPL(bcsr_write);
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void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set)
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{
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unsigned short r;
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unsigned long flags;
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spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
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r = __raw_readw(bcsr_regs[reg].raddr);
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r &= ~clr;
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r |= set;
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__raw_writew(r, bcsr_regs[reg].raddr);
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wmb();
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spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
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}
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EXPORT_SYMBOL_GPL(bcsr_mod);
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