97dcb82de6
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
40 lines
798 B
C
40 lines
798 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 by Ralf Baechle
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*/
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#ifndef __ASM_MACH_GENERIC_IRQ_H
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#define __ASM_MACH_GENERIC_IRQ_H
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#ifndef NR_IRQS
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#define NR_IRQS 128
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#endif
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#ifdef CONFIG_IRQ_CPU
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#ifndef MIPS_CPU_IRQ_BASE
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#ifdef CONFIG_I8259
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#define MIPS_CPU_IRQ_BASE 16
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#else
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#define MIPS_CPU_IRQ_BASE 0
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#endif /* CONFIG_I8259 */
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#endif
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#ifdef CONFIG_IRQ_CPU_RM7K
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#ifndef RM7K_CPU_IRQ_BASE
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#define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8)
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#endif
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#endif
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#ifdef CONFIG_IRQ_CPU_RM9K
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#ifndef RM9K_CPU_IRQ_BASE
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#define RM9K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+12)
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#endif
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#endif
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#endif /* CONFIG_IRQ_CPU */
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#endif /* __ASM_MACH_GENERIC_IRQ_H */
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