951d6f6d70
The watchdog code currently hardcodes the base address of the timer its using. To support new SoCs, make it support timers at any address. Use the soc_info structure to do this. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
68 lines
1.8 KiB
C
68 lines
1.8 KiB
C
/*
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* Header for code common to all DaVinci machines.
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
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#define __ARCH_ARM_MACH_DAVINCI_COMMON_H
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struct sys_timer;
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extern struct sys_timer davinci_timer;
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extern void davinci_irq_init(void);
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extern void __iomem *davinci_intc_base;
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/* parameters describe VBUS sourcing for host mode */
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extern void setup_usb(unsigned mA, unsigned potpgt_msec);
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/* parameters describe VBUS sourcing for host mode */
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extern void setup_usb(unsigned mA, unsigned potpgt_msec);
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struct davinci_timer_instance {
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void __iomem *base;
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u32 bottom_irq;
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u32 top_irq;
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};
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struct davinci_timer_info {
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struct davinci_timer_instance *timers;
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unsigned int clockevent_id;
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unsigned int clocksource_id;
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};
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/* SoC specific init support */
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struct davinci_soc_info {
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struct map_desc *io_desc;
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unsigned long io_desc_num;
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u32 cpu_id;
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u32 jtag_id;
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void __iomem *jtag_id_base;
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struct davinci_id *ids;
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unsigned long ids_num;
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struct davinci_clk *cpu_clks;
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void __iomem **psc_bases;
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unsigned long psc_bases_num;
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void __iomem *pinmux_base;
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const struct mux_config *pinmux_pins;
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unsigned long pinmux_pins_num;
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void __iomem *intc_base;
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int intc_type;
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u8 *intc_irq_prios;
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unsigned long intc_irq_num;
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struct davinci_timer_info *timer_info;
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void __iomem *wdt_base;
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};
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extern struct davinci_soc_info davinci_soc_info;
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extern void davinci_common_init(struct davinci_soc_info *soc_info);
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#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
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