Sagi Grimberg 911f4331bc IB/mlx5: Expose correct max_fast_reg_page_list_len ...

While documentation indicates that the number of translation
entries per memory key is unlimited, in practice, we can
only fit a finite amount of translation entries in a single
registration wqe (which is log_max_klm_list_size).

Signed-off-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>

2016-03-04 11:59:34 -05:00

..

ah.c

IB/mlx5: Add RoCE fields to Address Vector

2015-12-23 12:07:37 -05:00

cq.c

net/mlx5: Refactor mlx5_core_mr to mkey

2016-03-01 11:18:37 -05:00

doorbell.c

IB/mlx5: Fix Mellanox copyright note

2015-04-02 16:33:42 -04:00

gsi.c

IB/mlx5: Eliminate GSI RX QP's send buffers

2016-03-01 11:04:07 -05:00

Kconfig

net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality

2015-05-30 18:24:51 -07:00

mad.c

IB/mlx5: Modify MAD reading counters method to use counter registers

2016-03-01 10:57:15 -05:00

main.c

IB/mlx5: Expose correct max_fast_reg_page_list_len

2016-03-04 11:59:34 -05:00

Makefile

IB/mlx5: Add GSI QP wrapper

2016-03-01 11:03:41 -05:00

mem.c

IB/mlx5: Fix Mellanox copyright note

2015-04-02 16:33:42 -04:00

mlx5_ib.h

IB/mlx5: Convert UMR CQ to new CQ API

2016-03-04 11:58:41 -05:00

mr.c

IB/mlx5: Make coding style more consistent

2016-03-04 11:59:31 -05:00

odp.c

net/mlx5: Refactor mlx5_core_mr to mkey

2016-03-01 11:18:37 -05:00

qp.c

IB/mlx5: Added support for re-registration of MRs

2016-03-01 11:04:31 -05:00

srq.c

IB/mlx5: Add CQE version 1 support to user QPs and SRQs

2016-01-21 12:01:08 -05:00

user.h

IB/mlx5: Add memory windows allocation support

2016-03-01 11:18:54 -05:00