ae0e6a5d16
Use the generic dynamic interrupt moderation (dim) framework to implement adaptive interrupt coalescing on Rx. With the per-packet interrupt scheme, a high interrupt rate has been noted for moderate traffic flows leading to high CPU utilization. The 'dim' scheme implemented by the current patch addresses this issue improving CPU utilization while using minimal coalescing time thresholds in order to preserve a good latency. On the Tx side use an optimal time threshold value by default. This value has been optimized for Tx TCP streams at a rate of around 85kpps on a 1G link, at which rate half of the Tx ring size (128) gets filled in 1500 usecs. Scaling this down to 2.5G links yields the current value of 600 usecs, which is conservative and gives good enough results for 1G links too (see next). Below are some measurement results for before and after this patch (and related dependencies) basically, for a 2 ARM Cortex-A72 @1.3Ghz CPUs system (32 KB L1 data cache), using 60secs log netperf TCP stream tests @ 1Gbit link (maximum throughput): 1) 1 Rx TCP flow, both Rx and Tx processed by the same NAPI thread on the same CPU: CPU utilization int rate (ints/sec) Before: 50%-60% (over 50%) 92k After: 13%-22% 3.5k-12k Comment: Major CPU utilization improvement for a single flow Rx TCP flow (i.e. netperf -t TCP_MAERTS) on a single CPU. Usually settles under 16% for longer tests. 2) 4 Rx TCP flows + 4 Tx TCP flows (+ pings to check the latency): Total CPU utilization Total int rate (ints/sec) Before: ~80% (spikes to 90%) ~100k After: 60% (more steady) ~4k Comment: Important improvement for this load test, while the ping test outcome does not show any notable difference compared to before. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
56 lines
1.8 KiB
Plaintext
56 lines
1.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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config FSL_ENETC
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tristate "ENETC PF driver"
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depends on PCI && PCI_MSI
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select FSL_ENETC_MDIO
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select PHYLIB
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select DIMLIB
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help
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This driver supports NXP ENETC gigabit ethernet controller PCIe
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physical function (PF) devices, managing ENETC Ports at a privileged
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level.
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If compiled as module (M), the module name is fsl-enetc.
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config FSL_ENETC_VF
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tristate "ENETC VF driver"
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depends on PCI && PCI_MSI
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select PHYLIB
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select DIMLIB
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help
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This driver supports NXP ENETC gigabit ethernet controller PCIe
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virtual function (VF) devices enabled by the ENETC PF driver.
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If compiled as module (M), the module name is fsl-enetc-vf.
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config FSL_ENETC_MDIO
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tristate "ENETC MDIO driver"
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depends on PCI
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help
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This driver supports NXP ENETC Central MDIO controller as a PCIe
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physical function (PF) device.
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If compiled as module (M), the module name is fsl-enetc-mdio.
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config FSL_ENETC_PTP_CLOCK
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tristate "ENETC PTP clock driver"
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depends on PTP_1588_CLOCK_QORIQ && (FSL_ENETC || FSL_ENETC_VF)
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default y
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help
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This driver adds support for using the ENETC 1588 timer
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as a PTP clock. This clock is only useful if your PTP
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programs are getting hardware time stamps on the PTP Ethernet
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packets using the SO_TIMESTAMPING API.
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If compiled as module (M), the module name is fsl-enetc-ptp.
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config FSL_ENETC_QOS
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bool "ENETC hardware Time-sensitive Network support"
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depends on (FSL_ENETC || FSL_ENETC_VF) && (NET_SCH_TAPRIO || NET_SCH_CBS)
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help
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There are Time-Sensitive Network(TSN) capabilities(802.1Qbv/802.1Qci
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/802.1Qbu etc.) supported by ENETC. These TSN capabilities can be set
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enable/disable from user space via Qos commands(tc). In the kernel
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side, it can be loaded by Qos driver. Currently, it is only support
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taprio(802.1Qbv) and Credit Based Shaper(802.1Qbu).
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