861b5ae7cd
Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
150 lines
3.7 KiB
C
150 lines
3.7 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _BLACKFIN_BITOPS_H
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#define _BLACKFIN_BITOPS_H
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#include <linux/compiler.h>
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/__fls.h>
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/find.h>
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/const_hweight.h>
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#include <asm-generic/bitops/lock.h>
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#include <asm-generic/bitops/le.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#include <asm-generic/bitops/ext2-atomic.h>
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#include <asm-generic/bitops/minix.h>
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#ifndef CONFIG_SMP
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#include <linux/irqflags.h>
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/*
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* clear_bit may not imply a memory barrier
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*/
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#ifndef smp_mb__before_clear_bit
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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#endif
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#include <asm-generic/bitops/atomic.h>
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#include <asm-generic/bitops/non-atomic.h>
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#else
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#include <asm/byteorder.h> /* swab32 */
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#include <linux/linkage.h>
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asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_clear_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_toggle_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_test_set_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_test_clear_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_test_toggle_asm(volatile unsigned long *addr, int nr);
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asmlinkage int __raw_bit_test_asm(const volatile unsigned long *addr, int nr);
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static inline void set_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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__raw_bit_set_asm(a, nr & 0x1f);
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}
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static inline void clear_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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__raw_bit_clear_asm(a, nr & 0x1f);
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}
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static inline void change_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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__raw_bit_toggle_asm(a, nr & 0x1f);
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}
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static inline int test_bit(int nr, const volatile unsigned long *addr)
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{
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volatile const unsigned long *a = addr + (nr >> 5);
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return __raw_bit_test_asm(a, nr & 0x1f) != 0;
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}
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static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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return __raw_bit_test_set_asm(a, nr & 0x1f);
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}
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static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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return __raw_bit_test_clear_asm(a, nr & 0x1f);
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}
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static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr + (nr >> 5);
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return __raw_bit_test_toggle_asm(a, nr & 0x1f);
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}
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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#define test_bit __skip_test_bit
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#include <asm-generic/bitops/non-atomic.h>
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#undef test_bit
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#endif /* CONFIG_SMP */
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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static inline unsigned int __arch_hweight32(unsigned int w)
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{
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unsigned int res;
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__asm__ ("%0.l = ONES %1;"
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"%0 = %0.l (Z);"
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: "=d" (res) : "d" (w));
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return res;
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}
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static inline unsigned int __arch_hweight64(__u64 w)
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{
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return __arch_hweight32((unsigned int)(w >> 32)) +
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__arch_hweight32((unsigned int)w);
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}
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static inline unsigned int __arch_hweight16(unsigned int w)
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{
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return __arch_hweight32(w & 0xffff);
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}
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static inline unsigned int __arch_hweight8(unsigned int w)
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{
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return __arch_hweight32(w & 0xff);
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}
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#endif /* _BLACKFIN_BITOPS_H */
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