Charlene Liu 7fe538a4d6 drm/amd/display: fix DP 422 VID_M half the rate issue. ...

[Description]
when programming VID_TIMING, we were using the original VESA timing for DP_VIDM/N.
for YCbCr420 or compressed YCbCr422, using half rate as  YCbCr444.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-03-20 23:39:48 -05:00

..

acp

drm/amdgpu: Remove wrapper layer of cgs irq handling

2018-03-21 14:36:58 -05:00

amdgpu

drm/amdgpu: use more entries for the first paging queue

2019-03-20 23:39:47 -05:00

amdkfd

drm/amdkfd: add RAS ECC event support (v3)

2019-03-19 15:36:51 -05:00

display

drm/amd/display: fix DP 422 VID_M half the rate issue.

2019-03-20 23:39:48 -05:00

include

drm/amdgpu: remove chash

2019-03-19 15:36:58 -05:00

powerplay

drm/amd/powerplay: move the smc_if_version to asic file

2019-03-19 15:36:50 -05:00