79b6c8feb6
In order to be able to select the cfg depending on the HW revision or on the RF ID, we need to set up the trans before selecting the cfg. To do so, move the elements from cfg that are needed by iwl_trans_alloc() to a separate struct at the top of the cfg, so it can be used by other cfg types as well, before selecting the rest of the configuration. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
535 lines
14 KiB
C
535 lines
14 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2015 - 2016 Intel Deutschland GmbH
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* Copyright(C) 2018 - 2019 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called COPYING.
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*
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* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2015 - 2016 Intel Deutschland GmbH
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* Copyright (C) 2018 - 2019 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include "iwl-drv.h"
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#include "iwl-io.h"
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#include "iwl-csr.h"
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#include "iwl-debug.h"
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#include "iwl-prph.h"
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#include "iwl-fh.h"
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const struct iwl_csr_params iwl_csr_v1 = {
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.flag_mac_clock_ready = 0,
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.flag_val_mac_access_en = 0,
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.flag_init_done = 2,
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.flag_mac_access_req = 3,
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.flag_sw_reset = 7,
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.flag_master_dis = 8,
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.flag_stop_master = 9,
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.addr_sw_reset = CSR_BASE + 0x020,
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.mac_addr0_otp = 0x380,
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.mac_addr1_otp = 0x384,
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.mac_addr0_strap = 0x388,
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.mac_addr1_strap = 0x38C
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};
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const struct iwl_csr_params iwl_csr_v2 = {
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.flag_init_done = 6,
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.flag_mac_clock_ready = 20,
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.flag_val_mac_access_en = 20,
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.flag_mac_access_req = 21,
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.flag_master_dis = 28,
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.flag_stop_master = 29,
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.flag_sw_reset = 31,
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.addr_sw_reset = CSR_BASE + 0x024,
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.mac_addr0_otp = 0x30,
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.mac_addr1_otp = 0x34,
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.mac_addr0_strap = 0x38,
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.mac_addr1_strap = 0x3C
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};
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void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
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{
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trace_iwlwifi_dev_iowrite8(trans->dev, ofs, val);
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iwl_trans_write8(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_write8);
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void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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trace_iwlwifi_dev_iowrite32(trans->dev, ofs, val);
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iwl_trans_write32(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_write32);
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void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val)
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{
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trace_iwlwifi_dev_iowrite64(trans->dev, ofs, val);
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iwl_trans_write32(trans, ofs, lower_32_bits(val));
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iwl_trans_write32(trans, ofs + 4, upper_32_bits(val));
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}
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IWL_EXPORT_SYMBOL(iwl_write64);
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u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
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{
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u32 val = iwl_trans_read32(trans, ofs);
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trace_iwlwifi_dev_ioread32(trans->dev, ofs, val);
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return val;
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}
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IWL_EXPORT_SYMBOL(iwl_read32);
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#define IWL_POLL_INTERVAL 10 /* microseconds */
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read32(trans, addr) & mask) == (bits & mask))
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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IWL_EXPORT_SYMBOL(iwl_poll_bit);
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u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
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{
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u32 value = 0x5a5a5a5a;
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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value = iwl_read32(trans, reg);
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iwl_trans_release_nic_access(trans, &flags);
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}
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return value;
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}
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IWL_EXPORT_SYMBOL(iwl_read_direct32);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, reg, value);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_direct32);
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void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write64(trans, reg, value);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_direct64);
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int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read_direct32(trans, addr) & mask) == mask)
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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IWL_EXPORT_SYMBOL(iwl_poll_direct_bit);
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u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs)
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{
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u32 val = iwl_trans_read_prph(trans, ofs);
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trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
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return val;
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}
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IWL_EXPORT_SYMBOL(iwl_read_prph_no_grab);
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void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
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iwl_trans_write_prph(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph_no_grab);
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void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val)
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{
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trace_iwlwifi_dev_iowrite_prph64(trans->dev, ofs, val);
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iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
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iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph64_no_grab);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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unsigned long flags;
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u32 val = 0x5a5a5a5a;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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val = iwl_read_prph_no_grab(trans, ofs);
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iwl_trans_release_nic_access(trans, &flags);
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}
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return val;
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}
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IWL_EXPORT_SYMBOL(iwl_read_prph);
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void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs, val);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph);
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int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs,
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iwl_read_prph_no_grab(trans, ofs) |
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mask);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_set_bits_prph);
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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u32 bits, u32 mask)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs,
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(iwl_read_prph_no_grab(trans, ofs) &
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mask) | bits);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_set_bits_mask_prph);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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unsigned long flags;
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u32 val;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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val = iwl_read_prph_no_grab(trans, ofs);
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iwl_write_prph_no_grab(trans, ofs, (val & ~mask));
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_clear_bits_prph);
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void iwl_force_nmi(struct iwl_trans *trans)
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{
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if (trans->cfg->trans.device_family < IWL_DEVICE_FAMILY_9000)
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iwl_write_prph(trans, DEVICE_SET_NMI_REG,
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DEVICE_SET_NMI_VAL_DRV);
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else if (trans->cfg->trans.device_family < IWL_DEVICE_FAMILY_AX210)
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iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
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UREG_NIC_SET_NMI_DRIVER_NMI_FROM_DRIVER_MSK);
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else
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iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
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UREG_DOORBELL_TO_ISR6_NMI_BIT);
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}
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IWL_EXPORT_SYMBOL(iwl_force_nmi);
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static const char *get_rfh_string(int cmd)
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{
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#define IWL_CMD(x) case x: return #x
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#define IWL_CMD_MQ(arg, reg, q) { if (arg == reg(q)) return #reg; }
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int i;
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for (i = 0; i < IWL_MAX_RX_HW_QUEUES; i++) {
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IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_BA_LSB, i);
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IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_WIDX, i);
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IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_RIDX, i);
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IWL_CMD_MQ(cmd, RFH_Q_URBD_STTS_WPTR_LSB, i);
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}
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switch (cmd) {
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IWL_CMD(RFH_RXF_DMA_CFG);
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IWL_CMD(RFH_GEN_CFG);
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IWL_CMD(RFH_GEN_STATUS);
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IWL_CMD(FH_TSSR_TX_STATUS_REG);
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IWL_CMD(FH_TSSR_TX_ERROR_REG);
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default:
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return "UNKNOWN";
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}
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#undef IWL_CMD_MQ
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}
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struct reg {
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u32 addr;
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bool is64;
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};
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static int iwl_dump_rfh(struct iwl_trans *trans, char **buf)
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{
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int i, q;
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int num_q = trans->num_rx_queues;
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static const u32 rfh_tbl[] = {
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RFH_RXF_DMA_CFG,
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RFH_GEN_CFG,
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RFH_GEN_STATUS,
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FH_TSSR_TX_STATUS_REG,
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FH_TSSR_TX_ERROR_REG,
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};
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static const struct reg rfh_mq_tbl[] = {
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{ RFH_Q0_FRBDCB_BA_LSB, true },
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{ RFH_Q0_FRBDCB_WIDX, false },
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{ RFH_Q0_FRBDCB_RIDX, false },
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{ RFH_Q0_URBD_STTS_WPTR_LSB, true },
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};
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#ifdef CONFIG_IWLWIFI_DEBUGFS
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if (buf) {
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int pos = 0;
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/*
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* Register (up to 34 for name + 8 blank/q for MQ): 40 chars
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* Colon + space: 2 characters
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* 0X%08x: 10 characters
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* New line: 1 character
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* Total of 53 characters
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*/
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size_t bufsz = ARRAY_SIZE(rfh_tbl) * 53 +
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ARRAY_SIZE(rfh_mq_tbl) * 53 * num_q + 40;
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*buf = kmalloc(bufsz, GFP_KERNEL);
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if (!*buf)
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return -ENOMEM;
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pos += scnprintf(*buf + pos, bufsz - pos,
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"RFH register values:\n");
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for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
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pos += scnprintf(*buf + pos, bufsz - pos,
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"%40s: 0X%08x\n",
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get_rfh_string(rfh_tbl[i]),
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iwl_read_prph(trans, rfh_tbl[i]));
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for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
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for (q = 0; q < num_q; q++) {
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u32 addr = rfh_mq_tbl[i].addr;
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addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
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pos += scnprintf(*buf + pos, bufsz - pos,
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"%34s(q %2d): 0X%08x\n",
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get_rfh_string(addr), q,
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iwl_read_prph(trans, addr));
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}
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return pos;
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}
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#endif
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IWL_ERR(trans, "RFH register values:\n");
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for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
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IWL_ERR(trans, " %34s: 0X%08x\n",
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get_rfh_string(rfh_tbl[i]),
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iwl_read_prph(trans, rfh_tbl[i]));
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for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
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for (q = 0; q < num_q; q++) {
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u32 addr = rfh_mq_tbl[i].addr;
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addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
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IWL_ERR(trans, " %34s(q %d): 0X%08x\n",
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get_rfh_string(addr), q,
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iwl_read_prph(trans, addr));
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}
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return 0;
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}
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static const char *get_fh_string(int cmd)
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{
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switch (cmd) {
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IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
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IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
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IWL_CMD(FH_RSCSR_CHNL0_WPTR);
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IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
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IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
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IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
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IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
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IWL_CMD(FH_TSSR_TX_STATUS_REG);
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IWL_CMD(FH_TSSR_TX_ERROR_REG);
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default:
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return "UNKNOWN";
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}
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#undef IWL_CMD
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}
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int iwl_dump_fh(struct iwl_trans *trans, char **buf)
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{
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int i;
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static const u32 fh_tbl[] = {
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FH_RSCSR_CHNL0_STTS_WPTR_REG,
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FH_RSCSR_CHNL0_RBDCB_BASE_REG,
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FH_RSCSR_CHNL0_WPTR,
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FH_MEM_RCSR_CHNL0_CONFIG_REG,
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FH_MEM_RSSR_SHARED_CTRL_REG,
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|
FH_MEM_RSSR_RX_STATUS_REG,
|
|
FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
|
|
FH_TSSR_TX_STATUS_REG,
|
|
FH_TSSR_TX_ERROR_REG
|
|
};
|
|
|
|
if (trans->cfg->trans.mq_rx_supported)
|
|
return iwl_dump_rfh(trans, buf);
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
|
if (buf) {
|
|
int pos = 0;
|
|
size_t bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
|
|
|
|
*buf = kmalloc(bufsz, GFP_KERNEL);
|
|
if (!*buf)
|
|
return -ENOMEM;
|
|
|
|
pos += scnprintf(*buf + pos, bufsz - pos,
|
|
"FH register values:\n");
|
|
|
|
for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
|
|
pos += scnprintf(*buf + pos, bufsz - pos,
|
|
" %34s: 0X%08x\n",
|
|
get_fh_string(fh_tbl[i]),
|
|
iwl_read_direct32(trans, fh_tbl[i]));
|
|
|
|
return pos;
|
|
}
|
|
#endif
|
|
|
|
IWL_ERR(trans, "FH register values:\n");
|
|
for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
|
|
IWL_ERR(trans, " %34s: 0X%08x\n",
|
|
get_fh_string(fh_tbl[i]),
|
|
iwl_read_direct32(trans, fh_tbl[i]));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int iwl_finish_nic_init(struct iwl_trans *trans,
|
|
const struct iwl_cfg_trans_params *cfg_trans)
|
|
{
|
|
int err;
|
|
|
|
if (cfg_trans->bisr_workaround) {
|
|
/* ensure the TOP FSM isn't still in previous reset */
|
|
mdelay(2);
|
|
}
|
|
|
|
/*
|
|
* Set "initialization complete" bit to move adapter from
|
|
* D0U* --> D0A* (powered-up active) state.
|
|
*/
|
|
iwl_set_bit(trans, CSR_GP_CNTRL,
|
|
BIT(cfg_trans->csr->flag_init_done));
|
|
|
|
if (cfg_trans->device_family == IWL_DEVICE_FAMILY_8000)
|
|
udelay(2);
|
|
|
|
/*
|
|
* Wait for clock stabilization; once stabilized, access to
|
|
* device-internal resources is supported, e.g. iwl_write_prph()
|
|
* and accesses to uCode SRAM.
|
|
*/
|
|
err = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
|
BIT(cfg_trans->csr->flag_mac_clock_ready),
|
|
BIT(cfg_trans->csr->flag_mac_clock_ready),
|
|
25000);
|
|
if (err < 0)
|
|
IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
|
|
|
|
if (cfg_trans->bisr_workaround) {
|
|
/* ensure BISR shift has finished */
|
|
udelay(200);
|
|
}
|
|
|
|
return err < 0 ? err : 0;
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_finish_nic_init);
|