Files
android_kernel_xiaomi_sm8450/arch/powerpc/kernel
Christophe Leroy 797f4016f6 powerpc/40x: Avoid using r12 in TLB miss handlers
Let's reduce the number of registers used in TLB miss handlers.

We have both r9 and r12 available for any temporary use.

r9 is enough, avoid using r12.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/7f330e971952abb2645fb9ca4310c0f527e84dcb.1590079969.git.christophe.leroy@csgroup.eu
2020-05-28 23:24:36 +10:00
..
2020-05-28 23:24:36 +10:00
2020-01-27 22:37:24 +11:00
2020-03-10 15:16:42 +11:00
2019-08-30 09:52:57 +10:00
2020-05-26 23:36:57 +10:00
2020-05-11 23:15:15 +10:00
2020-05-26 22:56:03 +10:00
2020-05-26 23:36:51 +10:00