6bd33e1ece
The kernel runs in M-mode without using page tables, and thus can't run bare metal without help from additional firmware. Most of the patch is just stubbing out code not needed without page tables, but there is an interesting detail in the signals implementation: - The normal RISC-V syscall ABI only implements rt_sigreturn as VDSO entry point, but the ELF VDSO is not supported for nommu Linux. We instead copy the code to call the syscall onto the stack. In addition to enabling the nommu code a new defconfig for a small kernel image that can run in nommu mode on qemu is also provided, to run a kernel in qemu you can use the following command line: qemu-system-riscv64 -smp 2 -m 64 -machine virt -nographic \ -kernel arch/riscv/boot/loader \ -drive file=rootfs.ext2,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Anup Patel <anup@brainfault.org> [paul.walmsley@sifive.com: updated to apply; add CONFIG_MMU guards around PCI_IOBASE definition to fix build issues; fixed checkpatch issues; move the PCI_IO_* and VMEMMAP address space macros along with the others; resolve sparse warning] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
122 lines
2.8 KiB
C
122 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (c) 2018 Jim Wilson (jimw@sifive.com)
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*/
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#ifndef _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <linux/errno.h>
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#include <asm/asm.h>
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/* We don't even really need the extable code, but for now keep it simple */
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#ifndef CONFIG_MMU
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#define __enable_user_access() do { } while (0)
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#define __disable_user_access() do { } while (0)
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#endif
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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
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{ \
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uintptr_t tmp; \
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__enable_user_access(); \
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__asm__ __volatile__ ( \
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"1: " insn " \n" \
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"2: \n" \
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" .section .fixup,\"ax\" \n" \
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" .balign 4 \n" \
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"3: li %[r],%[e] \n" \
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" jump 2b,%[t] \n" \
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" .previous \n" \
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" .section __ex_table,\"a\" \n" \
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" .balign " RISCV_SZPTR " \n" \
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" " RISCV_PTR " 1b, 3b \n" \
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" .previous \n" \
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: [r] "+r" (ret), [ov] "=&r" (oldval), \
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[u] "+m" (*uaddr), [t] "=&r" (tmp) \
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: [op] "Jr" (oparg), [e] "i" (-EFAULT) \
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: "memory"); \
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__disable_user_access(); \
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}
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static inline int
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arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret = 0;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
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ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
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ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
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ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
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ret, oldval, uaddr, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
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ret, oldval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret = 0;
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u32 val;
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uintptr_t tmp;
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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__enable_user_access();
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__asm__ __volatile__ (
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"1: lr.w.aqrl %[v],%[u] \n"
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" bne %[v],%z[ov],3f \n"
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"2: sc.w.aqrl %[t],%z[nv],%[u] \n"
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" bnez %[t],1b \n"
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"3: \n"
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" .section .fixup,\"ax\" \n"
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" .balign 4 \n"
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"4: li %[r],%[e] \n"
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" jump 3b,%[t] \n"
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" .previous \n"
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" .section __ex_table,\"a\" \n"
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" .balign " RISCV_SZPTR " \n"
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" " RISCV_PTR " 1b, 4b \n"
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" " RISCV_PTR " 2b, 4b \n"
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" .previous \n"
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: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
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: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
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: "memory");
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__disable_user_access();
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*uval = val;
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return ret;
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}
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#endif /* _ASM_FUTEX_H */
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