
The RISC-V per-HART local interrupt controller manages software interrupts, timer interrupts, external interrupts (which are routed via the platform level interrupt controller) and other per-HART local interrupts. We add a driver for the RISC-V local interrupt controller, which eventually replaces the RISC-V architecture code, allowing for a better split between arch code and drivers. The driver is compliant with RISC-V Hart-Level Interrupt Controller DT bindings located at: Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt Co-developed-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> [Palmer: Cleaned up warnings] Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
31 lines
611 B
C
31 lines
611 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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* Copyright (C) 2018 Christoph Hellwig
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*/
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/seq_file.h>
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#include <asm/smp.h>
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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show_ipi_stats(p, prec);
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return 0;
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}
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asmlinkage __visible void __irq_entry do_IRQ(struct pt_regs *regs)
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{
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if (handle_arch_irq)
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handle_arch_irq(regs);
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}
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void __init init_IRQ(void)
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{
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irqchip_init();
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if (!handle_arch_irq)
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panic("No interrupt controller found.");
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}
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