68b8f60cf7
The 88E6352 family supports Energy Detect and has one bit for Sense and one bit for periodically transmit NLP (Energy Detect+TM). The 88E6390 family adds another bit to distinguish Auto or SW wake-up. Chips supporting EEE all have an EEE Enabled bit in the Port Status Register. This patch adds new ops for the PHY Energy Detect accesses. This also allows us to get rid of the MV88E6XXX_FLAG_EEE flag. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
66 lines
2.7 KiB
C
66 lines
2.7 KiB
C
/*
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* Marvell 88E6xxx PHY access
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _MV88E6XXX_PHY_H
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#define _MV88E6XXX_PHY_H
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#define MV88E6XXX_PHY_PAGE 0x16
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#define MV88E6XXX_PHY_PAGE_COPPER 0x00
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/* Page 0, Register 16: Copper Specific Control Register 1 */
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#define MV88E6XXX_PHY_CSCTL1 16
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#define MV88E6352_PHY_CSCTL1_ENERGY_DETECT_MASK 0x0300
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#define MV88E6352_PHY_CSCTL1_ENERGY_DETECT_OFF_MASK 0x0100 /* 0x */
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#define MV88E6352_PHY_CSCTL1_ENERGY_DETECT_SENSE_RCV 0x0200
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#define MV88E6352_PHY_CSCTL1_ENERGY_DETECT_SENSE_NLP 0x0300
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_MASK 0x0380
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_OFF_MASK 0x0180 /* 0xx */
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_SENSE_RCV_AUTO 0x0200
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_SENSE_RCV_SW 0x0280
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_SENSE_NLP_AUTO 0x0300
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#define MV88E6390_PHY_CSCTL1_ENERGY_DETECT_SENSE_NLP_SW 0x0380
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/* PHY Registers accesses implementations */
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int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 *val);
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int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 val);
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int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 *val);
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int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 val);
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/* Generic PHY operations */
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int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
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int reg, u16 *val);
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int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
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int reg, u16 val);
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int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 *val);
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int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 val);
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void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
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void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
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int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);
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int mv88e6352_phy_energy_detect_read(struct mv88e6xxx_chip *chip, int phy,
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struct ethtool_eee *eee);
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int mv88e6352_phy_energy_detect_write(struct mv88e6xxx_chip *chip, int phy,
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struct ethtool_eee *eee);
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int mv88e6390_phy_energy_detect_read(struct mv88e6xxx_chip *chip, int phy,
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struct ethtool_eee *eee);
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int mv88e6390_phy_energy_detect_write(struct mv88e6xxx_chip *chip, int phy,
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struct ethtool_eee *eee);
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#endif /*_MV88E6XXX_PHY_H */
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