Files
android_kernel_xiaomi_sm8450/arch/mips/boot/dts/brcm/bcm6358.dtsi
Linus Torvalds 892204e06c Merge tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS updates from James Hogan:
 "These are the main MIPS changes for 4.15.

  Fixes:
   - ralink: Fix MT7620 PCI build issues (4.5)
   - Disable cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN for 32-bit SMP
     (4.1)
   - Fix MIPS64 FP save/restore on 32-bit kernels (4.0)
   - ptrace: Pick up ptrace/seccomp changed syscall numbers (3.19)
   - ralink: Fix MT7628 pinmux (3.19)
   - BCM47XX: Fix LED inversion on WRT54GSv1 (3.17)
   - Fix n32 core dumping as o32 since regset support (3.13)
   - ralink: Drop obsolete USB_ARCH_HAS_HCD select

  Build system:
   - Default to "generic" (multiplatform) system type instead of IP22
   - Use generic little endian MIPS32 r2 configuration as default
     defconfig instead of ip22_defconfig

  FPU emulation:
   - Fix exception generation for certain R6 FPU instructions

  SMP:
   - Allow __cpu_number_map to be larger than NR_CPUS for sparse CPU id
     spaces

  Miscellaneous:
   - Add iomem resource for kernel bss section for kexec/kdump
   - Atomics: Nudge writes on bit unlock
   - DT files: Standardise "ok" -> "okay"

  Minor cleanups:
   - Define virt_to_pfn()
   - Make thread_saved_pc static
   - Simplify 32-bit sign extension in __read_64bit_c0_split()
   - DMA: Use vma_pages() helper
   - FPU emulation: Replace unsigned with unsigned int
   - MM: Removed unused lastpfn
   - Alchemy: Make clk_ops const
   - Lasat: Use setup_timer() helper
   - ralink: Use BIT() in MT7620 PCI driver

  Platform support:

  BMIPS:
  - Enable HARDIRQS_SW_RESEND

  Broadcom BCM63XX:
  - Add clkdev lookup support
  - Update clk driver, UART driver, DTs to handle named refclk from DTs
  - Split apart various clocks to more closely match hardware
  - Add ethernet clocks

  Cavium Octeon:
  - Remove usage of cvmx_wait() in favour of __delay()

  ImgTec Pistachio:
  - DT: Drop deprecated dwmmc num-slots property

  Ingenic JZ4780:
  - Add NFS root to Ci20 defconfig
  - Add watchdog to Ci20 DT & defconfig, and allow building of watchdog
    driver with this SoC

  Generic (multiplatform):
  - Migrate xilfpga (MIPSfpga) platform to the generic platform

  Lantiq xway:
  - Fix ASC0/ASC1 clocks"

* tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (46 commits)
  MIPS: Add iomem resource for kernel bss section.
  MIPS: cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN don't work for 32-bit SMP
  MIPS: BMIPS: Enable HARDIRQS_SW_RESEND
  MIPS: pci: Make use of the BIT() macro inside the mt7620 driver
  MIPS: pci: Remove KERN_WARN instance inside the mt7620 driver
  MIPS: pci: Remove duplicate define in mt7620 driver
  MIPS: ralink: Fix typo in mt7628 pinmux function
  MIPS: ralink: Fix MT7628 pinmux
  MIPS: Fix odd fp register warnings with MIPS64r2
  watchdog: jz4780: Allow selection of jz4740-wdt driver
  MIPS/ptrace: Update syscall nr on register changes
  MIPS/ptrace: Pick up ptrace/seccomp changed syscalls
  MIPS: Fix an n32 core file generation regset support regression
  MIPS: Fix MIPS64 FP save/restore on 32-bit kernels
  MIPS: page.h: Define virt_to_pfn()
  MIPS: Xilfpga: Switch to using generic defconfigs
  MIPS: generic: Add support for MIPSfpga
  MIPS: Set defconfig target to a generic system for 32r2el
  MIPS: Kconfig: Set default MIPS system type as generic
  MIPS: DTS: Remove num-slots from Pistachio SoC
  ...
2017-11-15 11:36:08 -08:00

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Plaintext

// SPDX-License-Identifier: GPL-2.0
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm6358";
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-hpt-frequency = <150000000>;
cpu@0 {
compatible = "brcm,bmips4350";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "brcm,bmips4350";
device_type = "cpu";
reg = <1>;
};
};
clocks {
periph_clk: periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
};
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
ubus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
periph_cntl: syscon@fffe0000 {
compatible = "syscon";
reg = <0xfffe0000 0xc>;
native-endian;
};
reboot: syscon-reboot@fffe0008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
mask = <0x1>;
};
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
reg = <0xfffe000c 0x8>,
<0xfffe0038 0x8>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>, <3>;
};
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-leds";
reg = <0xfffe00d0 0x8>;
status = "disabled";
};
uart0: serial@fffe0100 {
compatible = "brcm,bcm6345-uart";
reg = <0xfffe0100 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
clock-names = "refclk";
status = "disabled";
};
uart1: serial@fffe0120 {
compatible = "brcm,bcm6345-uart";
reg = <0xfffe0120 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <3>;
clocks = <&periph_clk>;
clock-names = "refclk";
status = "disabled";
};
ehci: usb@fffe1300 {
compatible = "brcm,bcm6358-ehci", "generic-ehci";
reg = <0xfffe1300 0x100>;
big-endian;
interrupt-parent = <&periph_intc>;
interrupts = <10>;
status = "disabled";
};
ohci: usb@fffe1400 {
compatible = "brcm,bcm6358-ohci", "generic-ohci";
reg = <0xfffe1400 0x100>;
big-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <5>;
status = "disabled";
};
};
};