Files
android_kernel_xiaomi_sm8450/arch/parisc/include/asm
Helge Deller 602c9c9a01 parisc: Initialize PCI bridge cache line and default latency
PCI controllers and pci-pci bridges may have not been fully initialized
regarding cache line and defaul latency.

This partly reverts
commit 5f0e9b4 ("parisc: Remove unused pcibios_init_bus()")

Signed-off-by: Helge Deller <deller@gmx.de>
2016-01-12 22:03:21 +01:00
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